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broadcom/compiler: use NIR's lowering for dispatch base

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Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24396>
This commit is contained in:
Iago Toral Quiroga 2023-07-27 09:59:48 +02:00 • committed by Marge Bot
parent 9211b9afdf
commit f5931ba6d8
2 changed files with 22 additions and 14 deletions
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26
src/broadcom/compiler/nir_to_vir.c
View file

@ -3567,29 +3567,31 @@ ntq_emit_intrinsic(struct v3d_compile *c, nir_intrinsic_instr *instr)
}
break;
case nir_intrinsic_load_workgroup_id_zero_base:
case nir_intrinsic_load_workgroup_id: {
struct qreg x = vir_AND(c, c->cs_payload[0],
vir_uniform_ui(c, 0xffff));
ntq_store_dest(c, &instr->dest, 0, x);
struct qreg y = vir_SHR(c, c->cs_payload[0],
vir_uniform_ui(c, 16));
ntq_store_dest(c, &instr->dest, 1, y);
struct qreg z = vir_AND(c, c->cs_payload[1],
vir_uniform_ui(c, 0xffff));
ntq_store_dest(c, &instr->dest, 2, z);
break;
}
/* We only support dispatch base in Vulkan */
if (c->key->environment == V3D_ENVIRONMENT_VULKAN) {
x = vir_ADD(c, x,
vir_uniform(c, QUNIFORM_WORK_GROUP_BASE, 0));
y = vir_ADD(c, y,
vir_uniform(c, QUNIFORM_WORK_GROUP_BASE, 1));
z = vir_ADD(c, z,
vir_uniform(c, QUNIFORM_WORK_GROUP_BASE, 2));
}
case nir_intrinsic_load_base_workgroup_id: {
struct qreg x = vir_uniform(c, QUNIFORM_WORK_GROUP_BASE, 0);
ntq_store_dest(c, &instr->dest, 0, x);
ntq_store_dest(c, &instr->dest, 0, vir_MOV(c, x));
ntq_store_dest(c, &instr->dest, 1, vir_MOV(c, y));
ntq_store_dest(c, &instr->dest, 2, vir_MOV(c, z));
struct qreg y = vir_uniform(c, QUNIFORM_WORK_GROUP_BASE, 1);
ntq_store_dest(c, &instr->dest, 1, y);
struct qreg z = vir_uniform(c, QUNIFORM_WORK_GROUP_BASE, 2);
ntq_store_dest(c, &instr->dest, 2, z);
break;
}

10
src/broadcom/vulkan/v3dv_pipeline.c
View file

@ -3095,14 +3095,20 @@ shared_type_info(const struct glsl_type *type, unsigned *size, unsigned *align)
}
static void
lower_cs_shared(struct nir_shader *nir)
lower_compute(struct nir_shader *nir)
{
if (!nir->info.shared_memory_explicit_layout) {
NIR_PASS(_, nir, nir_lower_vars_to_explicit_types,
nir_var_mem_shared, shared_type_info);
}
NIR_PASS(_, nir, nir_lower_explicit_io,
nir_var_mem_shared, nir_address_format_32bit_offset);
struct nir_lower_compute_system_values_options sysval_options = {
.has_base_workgroup_id = true,
};
NIR_PASS_V(nir, nir_lower_compute_system_values, &sysval_options);
}
static VkResult
@ -3190,7 +3196,7 @@ pipeline_compile_compute(struct v3dv_pipeline *pipeline,
v3d_optimize_nir(NULL, p_stage->nir);
pipeline_lower_nir(pipeline, p_stage, pipeline->layout);
lower_cs_shared(p_stage->nir);
lower_compute(p_stage->nir);
VkResult result = VK_SUCCESS;