From f54dfbf4feb09497fa3acd18f0bd96e92d514ea4 Mon Sep 17 00:00:00 2001
From: Caio Oliveira <caio.oliveira@intel.com>
Date: Tue, 18 Jun 2024 14:00:53 -0700
Subject: [PATCH] intel/brw: Move fs_reg data members up to brw_reg

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791>
---
 src/intel/compiler/brw_fs.cpp  |  8 ++------
 src/intel/compiler/brw_ir_fs.h |  7 ++-----
 src/intel/compiler/brw_reg.h   | 21 ++++++++++++++++++++-
 3 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index b9395ba5c99..b9b214baded 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -569,17 +569,13 @@ fs_reg::fs_reg(struct ::brw_reg reg) :
 bool
 fs_reg::equals(const fs_reg &r) const
 {
-   return brw_regs_equal(this, &r) &&
-          offset == r.offset &&
-          stride == r.stride;
+   return brw_regs_equal(this, &r);
 }
 
 bool
 fs_reg::negative_equals(const fs_reg &r) const
 {
-   return brw_regs_negative_equal(this, &r) &&
-          offset == r.offset &&
-          stride == r.stride;
+   return brw_regs_negative_equal(this, &r);
 }
 
 bool
diff --git a/src/intel/compiler/brw_ir_fs.h b/src/intel/compiler/brw_ir_fs.h
index dc2ebad161b..8bca35ca7d5 100644
--- a/src/intel/compiler/brw_ir_fs.h
+++ b/src/intel/compiler/brw_ir_fs.h
@@ -90,11 +90,8 @@ public:
    using brw_reg::d64;
    using brw_reg::u64;
 
-   /** Offset from the start of the (virtual) register in bytes. */
-   uint16_t offset;
-
-   /** Register region horizontal stride */
-   uint8_t stride;
+   using brw_reg::offset;
+   using brw_reg::stride;
 };
 
 static inline fs_reg
diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h
index 00161fdd2fe..909a06fa74a 100644
--- a/src/intel/compiler/brw_reg.h
+++ b/src/intel/compiler/brw_reg.h
@@ -187,6 +187,12 @@ struct brw_reg {
       int   d;
       unsigned ud;
    };
+
+   /** Offset from the start of the virtual register in bytes. */
+   uint16_t offset;
+
+   /** Register region horizontal stride of virtual registers */
+   uint8_t stride;
 };
 
 static inline unsigned
@@ -225,7 +231,10 @@ phys_subnr(const struct intel_device_info *devinfo, const struct brw_reg reg)
 static inline bool
 brw_regs_equal(const struct brw_reg *a, const struct brw_reg *b)
 {
-   return a->bits == b->bits && a->u64 == b->u64;
+   return a->bits   == b->bits &&
+          a->u64    == b->u64 &&
+          a->offset == b->offset &&
+          a->stride == b->stride;
 }
 
 static inline bool
@@ -369,6 +378,16 @@ brw_reg(enum brw_reg_file file,
    reg.width = width;
    reg.hstride = hstride;
    reg.pad1 = 0;
+
+   reg.offset = 0;
+   reg.stride = 1;
+   if (file == IMM &&
+       type != BRW_TYPE_V &&
+       type != BRW_TYPE_UV &&
+       type != BRW_TYPE_VF) {
+      reg.stride = 0;
+   }
+
    return reg;
 }