From f5032c4d528efe0519efb9fe83f5a9945da08006 Mon Sep 17 00:00:00 2001 From: Caio Oliveira Date: Tue, 21 Nov 2023 07:49:02 -0800 Subject: [PATCH] intel/compiler: Make fs_visitor not depend on fs_builder At this point this is more a header dependency due to inline functions, so shuffle them around. The end goal is to allow fs_builder have a reference to a fs_visitor (really a fs_shader). Note the header is still included, a later patch will move the includes to the call-sites. Reviewed-by: Kenneth Graunke Part-of: --- src/intel/compiler/brw_fs.cpp | 62 +++++++++++++++++++++++++++ src/intel/compiler/brw_fs.h | 66 ++++------------------------- src/intel/compiler/brw_fs_builder.h | 6 +++ 3 files changed, 76 insertions(+), 58 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 1e740a697ec..60ce87c3eb2 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -8205,3 +8205,65 @@ bool brw_should_print_shader(const nir_shader *shader, uint64_t debug_flag) { return INTEL_DEBUG(debug_flag) && (!shader->info.internal || NIR_DEBUG(PRINT_INTERNAL)); } + +namespace brw { + fs_reg + fetch_payload_reg(const brw::fs_builder &bld, uint8_t regs[2], + brw_reg_type type) + { + if (!regs[0]) + return fs_reg(); + + if (bld.dispatch_width() > 16) { + const fs_reg tmp = bld.vgrf(type); + const brw::fs_builder hbld = bld.exec_all().group(16, 0); + const unsigned m = bld.dispatch_width() / hbld.dispatch_width(); + fs_reg components[2]; + assert(m <= 2); + + for (unsigned g = 0; g < m; g++) + components[g] = retype(brw_vec8_grf(regs[g], 0), type); + + hbld.LOAD_PAYLOAD(tmp, components, m, 0); + + return tmp; + + } else { + return fs_reg(retype(brw_vec8_grf(regs[0], 0), type)); + } + } + + fs_reg + fetch_barycentric_reg(const brw::fs_builder &bld, uint8_t regs[2]) + { + if (!regs[0]) + return fs_reg(); + + const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_F, 2); + const brw::fs_builder hbld = bld.exec_all().group(8, 0); + const unsigned m = bld.dispatch_width() / hbld.dispatch_width(); + fs_reg *const components = new fs_reg[2 * m]; + + for (unsigned c = 0; c < 2; c++) { + for (unsigned g = 0; g < m; g++) + components[c * m + g] = offset(brw_vec8_grf(regs[g / 2], 0), + hbld, c + 2 * (g % 2)); + } + + hbld.LOAD_PAYLOAD(tmp, components, 2 * m, 0); + + delete[] components; + return tmp; + } + + void + check_dynamic_msaa_flag(const fs_builder &bld, + const struct brw_wm_prog_data *wm_prog_data, + enum brw_wm_msaa_flags flag) + { + fs_inst *inst = bld.AND(bld.null_reg_ud(), + dynamic_msaa_flags(wm_prog_data), + brw_imm_ud(flag)); + inst->conditional_mod = BRW_CONDITIONAL_NZ; + } +} diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 850f7930b99..12c18688e0b 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -72,10 +72,8 @@ namespace brw { struct brw_gs_compile; -static inline fs_reg -offset(const fs_reg ®, const brw::fs_builder &bld, unsigned delta) -{ - return offset(reg, bld.dispatch_width(), delta); +namespace brw { +class fs_builder; } struct shader_stats { @@ -565,54 +563,12 @@ private: }; namespace brw { - inline fs_reg + fs_reg fetch_payload_reg(const brw::fs_builder &bld, uint8_t regs[2], - brw_reg_type type = BRW_REGISTER_TYPE_F) - { - if (!regs[0]) - return fs_reg(); + brw_reg_type type = BRW_REGISTER_TYPE_F); - if (bld.dispatch_width() > 16) { - const fs_reg tmp = bld.vgrf(type); - const brw::fs_builder hbld = bld.exec_all().group(16, 0); - const unsigned m = bld.dispatch_width() / hbld.dispatch_width(); - fs_reg components[2]; - assert(m <= 2); - - for (unsigned g = 0; g < m; g++) - components[g] = retype(brw_vec8_grf(regs[g], 0), type); - - hbld.LOAD_PAYLOAD(tmp, components, m, 0); - - return tmp; - - } else { - return fs_reg(retype(brw_vec8_grf(regs[0], 0), type)); - } - } - - inline fs_reg - fetch_barycentric_reg(const brw::fs_builder &bld, uint8_t regs[2]) - { - if (!regs[0]) - return fs_reg(); - - const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_F, 2); - const brw::fs_builder hbld = bld.exec_all().group(8, 0); - const unsigned m = bld.dispatch_width() / hbld.dispatch_width(); - fs_reg *const components = new fs_reg[2 * m]; - - for (unsigned c = 0; c < 2; c++) { - for (unsigned g = 0; g < m; g++) - components[c * m + g] = offset(brw_vec8_grf(regs[g / 2], 0), - hbld, c + 2 * (g % 2)); - } - - hbld.LOAD_PAYLOAD(tmp, components, 2 * m, 0); - - delete[] components; - return tmp; - } + fs_reg + fetch_barycentric_reg(const brw::fs_builder &bld, uint8_t regs[2]); inline fs_reg dynamic_msaa_flags(const struct brw_wm_prog_data *wm_prog_data) @@ -621,16 +577,10 @@ namespace brw { BRW_REGISTER_TYPE_UD); } - inline void + void check_dynamic_msaa_flag(const fs_builder &bld, const struct brw_wm_prog_data *wm_prog_data, - enum brw_wm_msaa_flags flag) - { - fs_inst *inst = bld.AND(bld.null_reg_ud(), - dynamic_msaa_flags(wm_prog_data), - brw_imm_ud(flag)); - inst->conditional_mod = BRW_CONDITIONAL_NZ; - } + enum brw_wm_msaa_flags flag); bool lower_src_modifiers(fs_visitor *v, bblock_t *block, fs_inst *inst, unsigned i); diff --git a/src/intel/compiler/brw_fs_builder.h b/src/intel/compiler/brw_fs_builder.h index ae2874c6ffd..957602bfaf8 100644 --- a/src/intel/compiler/brw_fs_builder.h +++ b/src/intel/compiler/brw_fs_builder.h @@ -932,4 +932,10 @@ namespace brw { }; } +static inline fs_reg +offset(const fs_reg ®, const brw::fs_builder &bld, unsigned delta) +{ + return offset(reg, bld.dispatch_width(), delta); +} + #endif