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softpipe: fix up NUM_ENTRIES confusion
There were two different NUM_ENTRIES #defines for the framebuffer tile cache and the texture tile cache. Rename the later to fix the warnings: In file included from sp_flush.c:40:0: sp_tex_tile_cache.h:76:0: warning: "NUM_ENTRIES" redefined sp_tile_cache.h:78:0: note: this is the location of the previous definition In file included from sp_context.c:50:0: sp_tex_tile_cache.h:76:0: warning: "NUM_ENTRIES" redefined sp_tile_cache.h:78:0: note: this is the location of the previous definition Also, replace occurances of NUM_ENTRIES with Element() macro to be safer. Reviewed-by: José Fonseca <jfonseca@vmware.com>
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parent
2f6970ae97
commit
f4a2c29d93
3 changed files with 13 additions and 13 deletions
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@ -55,7 +55,7 @@ sp_create_tex_tile_cache( struct pipe_context *pipe )
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tc = CALLOC_STRUCT( softpipe_tex_tile_cache );
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if (tc) {
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tc->pipe = pipe;
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for (pos = 0; pos < NUM_ENTRIES; pos++) {
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for (pos = 0; pos < Elements(tc->entries); pos++) {
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tc->entries[pos].addr.bits.invalid = 1;
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}
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tc->last_tile = &tc->entries[0]; /* any tile */
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@ -70,7 +70,7 @@ sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache *tc)
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if (tc) {
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uint pos;
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for (pos = 0; pos < NUM_ENTRIES; pos++) {
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for (pos = 0; pos < Elements(tc->entries); pos++) {
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/*assert(tc->entries[pos].x < 0);*/
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}
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if (tc->transfer) {
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@ -97,7 +97,7 @@ sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache *tc)
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assert(tc);
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assert(tc->texture);
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for (i = 0; i < NUM_ENTRIES; i++) {
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for (i = 0; i < Elements(tc->entries); i++) {
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tc->entries[i].addr.bits.invalid = 1;
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}
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}
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@ -147,7 +147,7 @@ sp_tex_tile_cache_set_sampler_view(struct softpipe_tex_tile_cache *tc,
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/* mark as entries as invalid/empty */
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/* XXX we should try to avoid this when the teximage hasn't changed */
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for (i = 0; i < NUM_ENTRIES; i++) {
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for (i = 0; i < Elements(tc->entries); i++) {
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tc->entries[i].addr.bits.invalid = 1;
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}
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@ -169,7 +169,7 @@ sp_flush_tex_tile_cache(struct softpipe_tex_tile_cache *tc)
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if (tc->texture) {
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/* caching a texture, mark all entries as empty */
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for (pos = 0; pos < NUM_ENTRIES; pos++) {
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for (pos = 0; pos < Elements(tc->entries); pos++) {
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tc->entries[pos].addr.bits.invalid = 1;
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}
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tc->tex_face = -1;
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@ -194,7 +194,7 @@ tex_cache_pos( union tex_tile_address addr )
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addr.bits.face +
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addr.bits.level * 7);
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return entry % NUM_ENTRIES;
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return entry % NUM_TEX_TILE_ENTRIES;
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}
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/**
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@ -73,7 +73,7 @@ struct softpipe_tex_cached_tile
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} data;
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};
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#define NUM_ENTRIES 4
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#define NUM_TEX_TILE_ENTRIES 4
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struct softpipe_tex_tile_cache
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{
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@ -84,7 +84,7 @@ struct softpipe_tex_tile_cache
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struct pipe_resource *texture; /**< if caching a texture */
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unsigned timestamp;
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struct softpipe_tex_cached_tile entries[NUM_ENTRIES];
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struct softpipe_tex_cached_tile entries[NUM_TEX_TILE_ENTRIES];
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struct pipe_transfer *tex_trans;
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void *tex_trans_map;
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@ -99,7 +99,7 @@ sp_create_tile_cache( struct pipe_context *pipe )
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tc = CALLOC_STRUCT( softpipe_tile_cache );
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if (tc) {
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tc->pipe = pipe;
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for (pos = 0; pos < NUM_ENTRIES; pos++) {
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for (pos = 0; pos < Elements(tc->tile_addrs); pos++) {
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tc->tile_addrs[pos].bits.invalid = 1;
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}
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tc->last_tile_addr.bits.invalid = 1;
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@ -134,7 +134,7 @@ sp_destroy_tile_cache(struct softpipe_tile_cache *tc)
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if (tc) {
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uint pos;
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for (pos = 0; pos < NUM_ENTRIES; pos++) {
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for (pos = 0; pos < Elements(tc->entries); pos++) {
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/*assert(tc->entries[pos].x < 0);*/
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FREE( tc->entries[pos] );
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}
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@ -419,7 +419,7 @@ sp_flush_tile_cache(struct softpipe_tile_cache *tc)
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if (pt) {
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/* caching a drawing transfer */
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for (pos = 0; pos < NUM_ENTRIES; pos++) {
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for (pos = 0; pos < Elements(tc->entries); pos++) {
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struct softpipe_cached_tile *tile = tc->entries[pos];
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if (!tile)
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{
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@ -452,7 +452,7 @@ sp_alloc_tile(struct softpipe_tile_cache *tc)
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if (!tc->tile)
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{
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unsigned pos;
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for (pos = 0; pos < NUM_ENTRIES; ++pos) {
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for (pos = 0; pos < Elements(tc->entries); ++pos) {
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if (!tc->entries[pos])
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continue;
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@ -608,7 +608,7 @@ sp_tile_cache_clear(struct softpipe_tile_cache *tc,
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/* set flags to indicate all the tiles are cleared */
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memset(tc->clear_flags, 255, sizeof(tc->clear_flags));
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for (pos = 0; pos < NUM_ENTRIES; pos++) {
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for (pos = 0; pos < Elements(tc->tile_addrs); pos++) {
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tc->tile_addrs[pos].bits.invalid = 1;
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}
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tc->last_tile_addr.bits.invalid = 1;
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