From f49ba0874a82a0a1a896b34dea32847442299535 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Sat, 12 Jun 2021 20:57:36 -0400 Subject: [PATCH] asahi: Unify varying linking code with vertex shaders Signed-off-by: Alyssa Rosenzweig Part-of: --- src/asahi/compiler/agx_compile.c | 22 ++++++++++++++-------- src/gallium/drivers/asahi/agx_state.c | 27 ++++----------------------- src/gallium/drivers/asahi/agx_state.h | 3 --- 3 files changed, 18 insertions(+), 34 deletions(-) diff --git a/src/asahi/compiler/agx_compile.c b/src/asahi/compiler/agx_compile.c index 5f221372e0b..260896b30da 100644 --- a/src/asahi/compiler/agx_compile.c +++ b/src/asahi/compiler/agx_compile.c @@ -163,7 +163,7 @@ agx_emit_store_vary(agx_builder *b, nir_intrinsic_instr *instr) { nir_src *offset = nir_get_io_offset_src(instr); assert(nir_src_is_const(*offset) && "todo: indirects"); - unsigned imm_index = nir_intrinsic_base(instr); + unsigned imm_index = b->shader->varyings[nir_intrinsic_base(instr)]; imm_index += nir_intrinsic_component(instr); imm_index += nir_src_as_uint(*offset); @@ -1097,13 +1097,15 @@ agx_optimize_nir(nir_shader *nir) /* ABI: position first, then user, then psiz */ static void -agx_remap_varyings_vs(nir_shader *nir) +agx_remap_varyings_vs(nir_shader *nir, struct agx_varyings *varyings, + unsigned *remap) { unsigned base = 0; nir_variable *pos = nir_find_variable_with_location(nir, nir_var_shader_out, VARYING_SLOT_POS); if (pos) { - pos->data.driver_location = base; + assert(pos->data.driver_location < AGX_MAX_VARYINGS); + remap[pos->data.driver_location] = base; base += 4; } @@ -1114,15 +1116,19 @@ agx_remap_varyings_vs(nir_shader *nir) continue; } - var->data.driver_location = base; + assert(var->data.driver_location < AGX_MAX_VARYINGS); + remap[var->data.driver_location] = base; base += 4; } nir_variable *psiz = nir_find_variable_with_location(nir, nir_var_shader_out, VARYING_SLOT_PSIZ); if (psiz) { - psiz->data.driver_location = base; + assert(psiz->data.driver_location < AGX_MAX_VARYINGS); + remap[psiz->data.driver_location] = base; base += 1; } + + varyings->nr_slots = base; } static void @@ -1193,8 +1199,6 @@ agx_compile_shader_nir(nir_shader *nir, NIR_PASS_V(nir, nir_lower_indirect_derefs, nir_var_function_temp, ~0); if (ctx->stage == MESA_SHADER_VERTEX) { - agx_remap_varyings_vs(nir); - /* Lower from OpenGL [-1, 1] to [0, 1] if half-z is not set */ if (!key->vs.clip_halfz) NIR_PASS_V(nir, nir_lower_clip_halfz); @@ -1227,7 +1231,9 @@ agx_compile_shader_nir(nir_shader *nir, agx_optimize_nir(nir); /* Must be last since NIR passes can remap driver_location freely */ - if (ctx->stage == MESA_SHADER_FRAGMENT) { + if (ctx->stage == MESA_SHADER_VERTEX) { + agx_remap_varyings_vs(nir, &out->varyings, ctx->varyings); + } else if (ctx->stage == MESA_SHADER_FRAGMENT) { agx_remap_varyings_fs(nir, &out->varyings, ctx->varyings); } diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c index 74d2ea4c96d..6155a9fc271 100644 --- a/src/gallium/drivers/asahi/agx_state.c +++ b/src/gallium/drivers/asahi/agx_state.c @@ -816,23 +816,7 @@ agx_update_shader(struct agx_context *ctx, struct agx_compiled_shader **out, agx_compile_shader_nir(nir, &key->base, &binary, &compiled->info); - /* TODO: emit this properly */ - nir_variable_mode varying_mode = (nir->info.stage == MESA_SHADER_FRAGMENT) ? - nir_var_shader_in : nir_var_shader_out; - struct agx_varyings *varyings = &compiled->info.varyings; - unsigned varying_count = 0; - - nir_foreach_variable_with_modes(var, nir, varying_mode) { - unsigned loc = var->data.driver_location; - unsigned sz = glsl_count_attribute_slots(var->type, FALSE); - - varying_count = MAX2(varying_count, loc + sz); - } - - if (nir->info.stage == MESA_SHADER_VERTEX) - compiled->varying_count = varying_count; - unsigned packed_varying_sz = (AGX_VARYING_HEADER_LENGTH + varyings->nr_descs * AGX_VARYING_LENGTH); uint8_t *packed_varyings = alloca(packed_varying_sz); @@ -840,9 +824,6 @@ agx_update_shader(struct agx_context *ctx, struct agx_compiled_shader **out, cfg.slots_1 = cfg.slots_2 = varyings->nr_slots; } - if (varyings->nr_slots) - compiled->varying_count = varyings->nr_slots; - memcpy(packed_varyings + AGX_VARYING_HEADER_LENGTH, varyings->packed, varyings->nr_descs * AGX_VARYING_LENGTH); @@ -1040,7 +1021,7 @@ agx_build_pipeline(struct agx_context *ctx, struct agx_compiled_shader *cs, enum agx_pack(record, SET_SHADER, cfg) { cfg.code = cs->bo->ptr.gpu; cfg.register_quadwords = 0; - cfg.unk_2b = (cs->varying_count * 4); + cfg.unk_2b = cs->info.varyings.nr_slots; cfg.unk_2 = 0x0d; } @@ -1169,7 +1150,7 @@ demo_linkage(struct agx_compiled_shader *vs, struct agx_pool *pool) struct agx_ptr t = agx_pool_alloc_aligned(pool, AGX_LINKAGE_LENGTH, 64); agx_pack(t.cpu, LINKAGE, cfg) { - cfg.varying_count = 4 * vs->varying_count; + cfg.varying_count = vs->info.varyings.nr_slots; cfg.unk_1 = 0x210000; // varyings otherwise wrong }; @@ -1264,8 +1245,8 @@ agx_encode_state(struct agx_context *ctx, uint8_t *out, { agx_pack(out, BIND_PIPELINE, cfg) { cfg.pipeline = pipeline_vertex; - cfg.vs_output_count_1 = (ctx->vs->varying_count * 4); - cfg.vs_output_count_2 = (ctx->vs->varying_count * 4); + cfg.vs_output_count_1 = ctx->vs->info.varyings.nr_slots; + cfg.vs_output_count_2 = ctx->vs->info.varyings.nr_slots; } /* yes, it's really 17 bytes */ diff --git a/src/gallium/drivers/asahi/agx_state.h b/src/gallium/drivers/asahi/agx_state.h index 0cc3b57e0b4..11122d6d72f 100644 --- a/src/gallium/drivers/asahi/agx_state.h +++ b/src/gallium/drivers/asahi/agx_state.h @@ -60,9 +60,6 @@ struct agx_compiled_shader { /* Varying descriptor (TODO: is this the right place?) */ uint64_t varyings; - /* # of varyings (currently vec4, should probably be changed) */ - unsigned varying_count; - /* Metadata returned from the compiler */ struct agx_shader_info info; };