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anv: bring back some lost game drirc workarounds for subgroups

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Fixes: d39e443ef8 (" anv: add infrastructure for common vk_pipeline")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38179>
This commit is contained in:
Tapani Pälli 2025-10-31 10:47:39 +02:00 • committed by Marge Bot
parent 3c7fa2e6eb
commit f48df6f45c
1 changed files with 28 additions and 3 deletions
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31
src/intel/vulkan/anv_shader_compile.c
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@ -699,8 +699,10 @@ lookup_ycbcr_conversion(const void *_stage, uint32_t set,
}
static void
anv_fixup_subgroup_size(struct anv_instance *instance, struct shader_info *info)
anv_fixup_subgroup_size(struct anv_device *device, struct shader_info *info)
{
const struct anv_instance *instance = device->physical->instance;
if (!mesa_shader_stage_uses_workgroup(info->stage))
return;
@ -721,6 +723,29 @@ anv_fixup_subgroup_size(struct anv_instance *instance, struct shader_info *info)
info->min_subgroup_size = BRW_SUBGROUP_SIZE;
}
if (instance->assume_full_subgroups_with_barrier &&
info->stage == MESA_SHADER_COMPUTE &&
device->info->verx10 <= 125 &&
info->uses_control_barrier &&
info->min_subgroup_size != info->max_subgroup_size &&
local_size &&
local_size % BRW_SUBGROUP_SIZE == 0) {
info->max_subgroup_size = BRW_SUBGROUP_SIZE;
info->min_subgroup_size = BRW_SUBGROUP_SIZE;
}
/* Similarly, sometimes games rely on the implicit synchronization of
* the shared memory accesses, and choosing smaller subgroups than the game
* expects will cause bugs. */
if (instance->assume_full_subgroups_with_shared_memory &&
info->shared_size > 0 &&
info->min_subgroup_size != info->max_subgroup_size &&
local_size &&
local_size % BRW_SUBGROUP_SIZE == 0) {
info->max_subgroup_size = BRW_SUBGROUP_SIZE;
info->min_subgroup_size = BRW_SUBGROUP_SIZE;
}
/* Cooperative matrix extension requires that all invocations in a subgroup
* be active. As a result, when the application does not request a specific
* subgroup size, we must use SIMD32.
@ -1307,7 +1332,7 @@ anv_shader_lower_nir(struct anv_device *device,
if (nir->info.stage == MESA_SHADER_COMPUTE &&
nir->info.cs.has_cooperative_matrix) {
anv_fixup_subgroup_size(pdevice->instance, &nir->info);
anv_fixup_subgroup_size(device, &nir->info);
NIR_PASS(_, nir, brw_nir_lower_cmat, nir->info.api_subgroup_size);
NIR_PASS(_, nir, nir_lower_indirect_derefs, nir_var_function_temp, 16);
}
@ -1890,7 +1915,7 @@ anv_shader_compile(struct vk_device *vk_device,
anv_shader_lower_nir(device, mem_ctx, state, shader_data);
anv_fixup_subgroup_size(device->physical->instance,
anv_fixup_subgroup_size(device,
&shader_data->info->nir->info);
anv_nir_apply_shader_workarounds(shader_data->info->nir);