i965/fs: Respect ARB_color_buffer_float clamping.

This was done in the old codegen path, but not the new one.  Caught by
piglit fbo tests after the conversion to GLSL ff_fragment_shader.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit da53ca641106e47f1d74386d8dc0f7eebeec5225)
This commit is contained in:
Eric Anholt 2011-07-25 18:50:43 -07:00 committed by Kenneth Graunke
parent b9c7773e0d
commit f484fc7476

View file

@ -1737,6 +1737,7 @@ void
fs_visitor::emit_color_write(int index, int first_color_mrf, fs_reg color)
{
int reg_width = c->dispatch_width / 8;
fs_inst *inst;
if (c->dispatch_width == 8 || intel->gen == 6) {
/* SIMD8 write looks like:
@ -1755,8 +1756,10 @@ fs_visitor::emit_color_write(int index, int first_color_mrf, fs_reg color)
* m + 6: a0
* m + 7: a1
*/
emit(BRW_OPCODE_MOV, fs_reg(MRF, first_color_mrf + index * reg_width),
color);
inst = emit(BRW_OPCODE_MOV,
fs_reg(MRF, first_color_mrf + index * reg_width),
color);
inst->saturate = c->key.clamp_fragment_color;
} else {
/* pre-gen6 SIMD16 single source DP write looks like:
* m + 0: r0
@ -1774,16 +1777,22 @@ fs_visitor::emit_color_write(int index, int first_color_mrf, fs_reg color)
* usual destination + 1 for the second half we get
* destination + 4.
*/
emit(BRW_OPCODE_MOV,
fs_reg(MRF, BRW_MRF_COMPR4 + first_color_mrf + index), color);
inst = emit(BRW_OPCODE_MOV,
fs_reg(MRF, BRW_MRF_COMPR4 + first_color_mrf + index),
color);
inst->saturate = c->key.clamp_fragment_color;
} else {
push_force_uncompressed();
emit(BRW_OPCODE_MOV, fs_reg(MRF, first_color_mrf + index), color);
inst = emit(BRW_OPCODE_MOV, fs_reg(MRF, first_color_mrf + index),
color);
inst->saturate = c->key.clamp_fragment_color;
pop_force_uncompressed();
push_force_sechalf();
color.sechalf = true;
emit(BRW_OPCODE_MOV, fs_reg(MRF, first_color_mrf + index + 4), color);
inst = emit(BRW_OPCODE_MOV, fs_reg(MRF, first_color_mrf + index + 4),
color);
inst->saturate = c->key.clamp_fragment_color;
pop_force_sechalf();
color.sechalf = false;
}