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agx: Set PIPE_SHADER_CAP_INDIRECT_CONST_ADDR

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Avoids spilling in t-rex.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18804>
This commit is contained in:
Alyssa Rosenzweig 2022-09-21 23:43:48 -04:00 • committed by Marge Bot
parent 6a183a9ffd
commit f4726cf240
1 changed files with 0 additions and 3 deletions
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3
src/gallium/drivers/asahi/agx_pipe.c
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@ -918,7 +918,6 @@ agx_get_shader_param(struct pipe_screen* pscreen,
enum pipe_shader_type shader,
enum pipe_shader_cap param)
{
bool is_deqp = agx_device(pscreen)->debug & AGX_DBG_DEQP;
bool is_no16 = agx_device(pscreen)->debug & AGX_DBG_NO16;
if (shader != PIPE_SHADER_VERTEX &&
@ -962,8 +961,6 @@ agx_get_shader_param(struct pipe_screen* pscreen,
return 0;
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
return is_deqp;
case PIPE_SHADER_CAP_INTEGERS:
return true;