diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 13a99fbad52..4d6ba6ae3aa 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -1464,7 +1464,7 @@ radv_surface_max_layer_count(struct radv_image_view *iview)
                                                        : (iview->vk.base_array_layer + iview->vk.layer_count);
 }
 
-unsigned
+static unsigned
 radv_get_dcc_max_uncompressed_block_size(const struct radv_device *device, const struct radv_image *image)
 {
    const struct radv_physical_device *pdev = radv_device_physical(device);
diff --git a/src/amd/vulkan/radv_device.h b/src/amd/vulkan/radv_device.h
index a719b1e23c1..a718f8d7e70 100644
--- a/src/amd/vulkan/radv_device.h
+++ b/src/amd/vulkan/radv_device.h
@@ -358,8 +358,6 @@ unsigned radv_get_default_max_sample_dist(int log_samples);
 void radv_emit_default_sample_locations(const struct radv_physical_device *pdev, struct radeon_cmdbuf *cs,
                                         int nr_samples);
 
-unsigned radv_get_dcc_max_uncompressed_block_size(const struct radv_device *device, const struct radv_image *image);
-
 struct radv_color_buffer_info {
    struct ac_cb_surface ac;
 };
diff --git a/src/amd/vulkan/radv_sdma.c b/src/amd/vulkan/radv_sdma.c
index 2b6e3262ad3..b365950e19b 100644
--- a/src/amd/vulkan/radv_sdma.c
+++ b/src/amd/vulkan/radv_sdma.c
@@ -208,11 +208,10 @@ radv_sdma_get_metadata_config(const struct radv_device *const device, const stru
    const uint32_t number_type = radv_translate_buffer_numformat(desc, vk_format_get_first_non_void_channel(format));
    const uint32_t surface_type = radv_sdma_surface_type_from_aspect_mask(subresource.aspectMask);
    const uint32_t max_comp_block_size = surf->u.gfx9.color.dcc.max_compressed_block_size;
-   const uint32_t max_uncomp_block_size = radv_get_dcc_max_uncompressed_block_size(device, image);
    const uint32_t pipe_aligned = radv_htile_enabled(image, subresource.mipLevel) || surf->u.gfx9.color.dcc.pipe_aligned;
 
    return data_format | alpha_is_on_msb << 8 | number_type << 9 | surface_type << 12 | max_comp_block_size << 24 |
-          max_uncomp_block_size << 26 | pipe_aligned << 31;
+          V_028C78_MAX_BLOCK_SIZE_256B << 26 | pipe_aligned << 31;
 }
 
 static uint32_t