From f43bc8e8be3e922fcbe8fca25507233b0856604b Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Mon, 18 May 2026 14:57:19 +0200 Subject: [PATCH] radv: support VK_KHR_shader_fma Reviewed-by: Samuel Pitoiset Part-of: --- docs/features.txt | 2 +- docs/relnotes/new_features.txt | 1 + src/amd/ci/radv-fails.txt | 26 +++++++++++++++++++++ src/amd/vulkan/radv_physical_device.c | 6 +++++ src/gallium/drivers/zink/ci/traces-zink.yml | 6 ++--- 5 files changed, 37 insertions(+), 4 deletions(-) diff --git a/docs/features.txt b/docs/features.txt index 299a6a7514d..51252e12888 100644 --- a/docs/features.txt +++ b/docs/features.txt @@ -581,7 +581,7 @@ Khronos extensions that are not part of any Vulkan version: VK_KHR_shader_bfloat16 DONE (anv/gfx12.5+, radv/gfx12+, vn) VK_KHR_shader_clock DONE (anv, hasvk, lvp, nvk, panvk, radv, tu, vn) VK_KHR_shader_constant_data DONE (anv, radv) - VK_KHR_shader_fma DONE (kk, vn) + VK_KHR_shader_fma DONE (kk, radv, vn) VK_KHR_shader_maximal_reconvergence DONE (anv, hk, kk, lvp, nvk, panvk/v10+, radv, vn) VK_KHR_shader_quad_control DONE (anv, hk, lvp, nvk, panvk/v10+, radv, vn) VK_KHR_shader_relaxed_extended_instruction DONE (anv, hasvk, hk, kk, lvp, nvk, panvk, pvr, radv, tu, v3dv, vn) diff --git a/docs/relnotes/new_features.txt b/docs/relnotes/new_features.txt index c9795278501..8a578371886 100644 --- a/docs/relnotes/new_features.txt +++ b/docs/relnotes/new_features.txt @@ -15,3 +15,4 @@ VK_KHR_maintenance11 on RADV OpenCL 3.1 support for rusticl on asahi, iris, radeonsi, llvmpipe and zink VK_KHR_workgroup_memory_explicit_layout on pvr VK_KHR_maintenance5 on pvr +VK_KHR_shader_fma on RADV diff --git a/src/amd/ci/radv-fails.txt b/src/amd/ci/radv-fails.txt index 297308e7359..30a8931c380 100644 --- a/src/amd/ci/radv-fails.txt +++ b/src/amd/ci/radv-fails.txt @@ -2,3 +2,29 @@ dEQP-VK.info.device_extension_dependencies,Fail # VKCTS bug: https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/6446 dEQP-VK.binding_model.descriptor_heap.basic.fragment.input_attachment,Fail + +# CTS is missing -frounding-math: https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/6580 +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.scalar.rte.denorm_flush.directed,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.scalar.rte.denorm_flush.float_controls,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.scalar.rte.denorm_none.directed,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.scalar.rte.denorm_none.float_controls,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.vec2.rte.denorm_flush.directed,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.vec2.rte.denorm_flush.float_controls,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.vec2.rte.denorm_none.directed,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.vec2.rte.denorm_none.float_controls,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.vec3.rte.denorm_flush.directed,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.vec3.rte.denorm_flush.float_controls,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.vec3.rte.denorm_none.directed,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.vec3.rte.denorm_none.float_controls,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.vec4.rte.denorm_flush.directed,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.vec4.rte.denorm_flush.float_controls,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.vec4.rte.denorm_none.directed,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp32.vec4.rte.denorm_none.float_controls,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp64.scalar.rte.denorm_flush.directed,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp64.scalar.rte.denorm_flush.float_controls,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp64.vec2.rte.denorm_flush.directed,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp64.vec2.rte.denorm_flush.float_controls,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp64.vec3.rte.denorm_flush.directed,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp64.vec3.rte.denorm_flush.float_controls,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp64.vec4.rte.denorm_flush.directed,Fail +dEQP-VK.spirv_assembly.instruction.compute.opfma.fp64.vec4.rte.denorm_flush.float_controls,Fail diff --git a/src/amd/vulkan/radv_physical_device.c b/src/amd/vulkan/radv_physical_device.c index 0b48f66c43f..657635223d0 100644 --- a/src/amd/vulkan/radv_physical_device.c +++ b/src/amd/vulkan/radv_physical_device.c @@ -763,6 +763,7 @@ radv_physical_device_get_supported_extensions(const struct radv_physical_device .KHR_shader_float16_int8 = true, .KHR_shader_float_controls = true, .KHR_shader_float_controls2 = true, + .KHR_shader_fma = true, .KHR_shader_integer_dot_product = true, .KHR_shader_maximal_reconvergence = true, .KHR_shader_non_semantic_info = true, @@ -1621,6 +1622,11 @@ radv_physical_device_get_features(const struct radv_physical_device *pdev, struc /* VK_KHR_maintenance11 */ .maintenance11 = true, + + /* VK_KHR_shader_fma */ + .shaderFmaFloat16 = radv_shader_fp16_enabled(pdev), + .shaderFmaFloat32 = true, + .shaderFmaFloat64 = true, }; } diff --git a/src/gallium/drivers/zink/ci/traces-zink.yml b/src/gallium/drivers/zink/ci/traces-zink.yml index 6d26057c633..4a4b09cadf1 100644 --- a/src/gallium/drivers/zink/ci/traces-zink.yml +++ b/src/gallium/drivers/zink/ci/traces-zink.yml @@ -153,9 +153,9 @@ traces: gl-zink-anv-tgl: checksum: 04a5a9b7cbc88d8a66c33b5f1c08294d zink-radv-vangogh: - checksum: b361dcda8115d96061fd3700c1d5c415 + checksum: cb5220d7e102b43ce3d778414f547bab zink-radv-gfx1201: - checksum: b361dcda8115d96061fd3700c1d5c415 + checksum: cb5220d7e102b43ce3d778414f547bab humus/AmbientAperture-v2.trace: gl-zink-anv-adl: @@ -163,7 +163,7 @@ traces: gl-zink-anv-tgl: checksum: 0f3b7351a84e1e6f15430f8766af4b4c zink-radv-vangogh: - checksum: 8347dcdc720c4a3799df737f24c10a88 + checksum: fae285449fe53b508c22e2265b534523 zink-radv-gfx1201: checksum: 31566f62731204fe422d22db9c5ba759