gallivm: misc clean-ups in lp_bld_nir.c

Use switch instead of if/else. Add some braces. 80-column wrapping, etc.

Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20211>
This commit is contained in:
Brian Paul 2022-12-07 13:26:55 -07:00 committed by Marge Bot
parent d44c4b1e0e
commit f3d2d076ed

View file

@ -1566,10 +1566,14 @@ visit_load_ssbo(struct lp_build_nir_context *bld_base,
nir_intrinsic_instr *instr,
LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
{
LLVMValueRef idx = cast_type(bld_base, get_src(bld_base, instr->src[0]), nir_type_uint, 32);
LLVMValueRef idx = cast_type(bld_base, get_src(bld_base, instr->src[0]),
nir_type_uint, 32);
LLVMValueRef offset = get_src(bld_base, instr->src[1]);
bool index_and_offset_are_uniform = nir_src_is_always_uniform(instr->src[0]) && nir_src_is_always_uniform(instr->src[1]);
bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
bool index_and_offset_are_uniform =
nir_src_is_always_uniform(instr->src[0]) &&
nir_src_is_always_uniform(instr->src[1]);
bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest),
nir_dest_bit_size(instr->dest),
index_and_offset_are_uniform, idx, offset, result);
}
@ -1579,13 +1583,17 @@ visit_store_ssbo(struct lp_build_nir_context *bld_base,
nir_intrinsic_instr *instr)
{
LLVMValueRef val = get_src(bld_base, instr->src[0]);
LLVMValueRef idx = cast_type(bld_base, get_src(bld_base, instr->src[1]), nir_type_uint, 32);
LLVMValueRef idx = cast_type(bld_base, get_src(bld_base, instr->src[1]),
nir_type_uint, 32);
LLVMValueRef offset = get_src(bld_base, instr->src[2]);
bool index_and_offset_are_uniform = nir_src_is_always_uniform(instr->src[1]) && nir_src_is_always_uniform(instr->src[2]);
bool index_and_offset_are_uniform =
nir_src_is_always_uniform(instr->src[1]) &&
nir_src_is_always_uniform(instr->src[2]);
int writemask = instr->const_index[0];
int nc = nir_src_num_components(instr->src[0]);
int bitsize = nir_src_bit_size(instr->src[0]);
bld_base->store_mem(bld_base, writemask, nc, bitsize, index_and_offset_are_uniform, idx, offset, val);
bld_base->store_mem(bld_base, writemask, nc, bitsize,
index_and_offset_are_uniform, idx, offset, val);
}
@ -1820,6 +1828,7 @@ visit_image_samples(struct lp_build_nir_context *bld_base,
bld_base->image_size(bld_base, &params);
}
static void
visit_shared_load(struct lp_build_nir_context *bld_base,
nir_intrinsic_instr *instr,
@ -1827,7 +1836,8 @@ visit_shared_load(struct lp_build_nir_context *bld_base,
{
LLVMValueRef offset = get_src(bld_base, instr->src[0]);
bool offset_is_uniform = nir_src_is_always_uniform(instr->src[0]);
bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest),
nir_dest_bit_size(instr->dest),
offset_is_uniform, NULL, offset, result);
}
@ -1842,7 +1852,8 @@ visit_shared_store(struct lp_build_nir_context *bld_base,
int writemask = instr->const_index[1];
int nc = nir_src_num_components(instr->src[0]);
int bitsize = nir_src_bit_size(instr->src[0]);
bld_base->store_mem(bld_base, writemask, nc, bitsize, offset_is_uniform, NULL, offset, val);
bld_base->store_mem(bld_base, writemask, nc, bitsize,
offset_is_uniform, NULL, offset, val);
}
@ -1858,7 +1869,8 @@ visit_shared_atomic(struct lp_build_nir_context *bld_base,
if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap)
val2 = get_src(bld_base, instr->src[2]);
bld_base->atomic_mem(bld_base, instr->intrinsic, bitsize, NULL, offset, val, val2, &result[0]);
bld_base->atomic_mem(bld_base, instr->intrinsic, bitsize, NULL,
offset, val, val2, &result[0]);
}
@ -1904,7 +1916,8 @@ visit_load_global(struct lp_build_nir_context *bld_base,
{
LLVMValueRef addr = get_src(bld_base, instr->src[0]);
bool offset_is_uniform = nir_src_is_always_uniform(instr->src[0]);
bld_base->load_global(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
bld_base->load_global(bld_base, nir_dest_num_components(instr->dest),
nir_dest_bit_size(instr->dest),
nir_src_bit_size(instr->src[0]),
offset_is_uniform, addr, result);
}
@ -1948,9 +1961,11 @@ static void visit_shuffle(struct lp_build_nir_context *bld_base,
LLVMValueRef dst[4])
{
LLVMValueRef src = get_src(bld_base, instr->src[0]);
src = cast_type(bld_base, src, nir_type_int, nir_src_bit_size(instr->src[0]));
src = cast_type(bld_base, src, nir_type_int,
nir_src_bit_size(instr->src[0]));
LLVMValueRef index = get_src(bld_base, instr->src[1]);
index = cast_type(bld_base, index, nir_type_uint, nir_src_bit_size(instr->src[1]));
index = cast_type(bld_base, index, nir_type_uint,
nir_src_bit_size(instr->src[1]));
bld_base->shuffle(bld_base, src, index, instr, dst);
}
@ -2254,6 +2269,7 @@ visit_txs(struct lp_build_nir_context *bld_base, nir_tex_instr *instr)
LLVMValueRef sizes_out[NIR_MAX_VEC_COMPONENTS];
LLVMValueRef explicit_lod = NULL;
LLVMValueRef texture_unit_offset = NULL;
for (unsigned i = 0; i < instr->num_srcs; i++) {
switch (instr->src[i].src_type) {
case nir_tex_src_lod:
@ -2308,6 +2324,13 @@ lp_build_nir_lod_property(struct lp_build_nir_context *bld_base,
static void
visit_tex(struct lp_build_nir_context *bld_base, nir_tex_instr *instr)
{
if (instr->op == nir_texop_txs ||
instr->op == nir_texop_query_levels ||
instr->op == nir_texop_texture_samples) {
visit_txs(bld_base, instr);
return;
}
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMBuilderRef builder = gallivm->builder;
LLVMValueRef coords[5];
@ -2326,31 +2349,30 @@ visit_tex(struct lp_build_nir_context *bld_base, nir_tex_instr *instr)
memset(&params, 0, sizeof(params));
enum lp_sampler_lod_property lod_property = LP_SAMPLER_LOD_SCALAR;
if (instr->op == nir_texop_txs || instr->op == nir_texop_query_levels || instr->op == nir_texop_texture_samples) {
visit_txs(bld_base, instr);
return;
}
if (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)
if (instr->op == nir_texop_txf ||
instr->op == nir_texop_txf_ms) {
sample_key |= LP_SAMPLER_OP_FETCH << LP_SAMPLER_OP_TYPE_SHIFT;
else if (instr->op == nir_texop_tg4) {
} else if (instr->op == nir_texop_tg4) {
sample_key |= LP_SAMPLER_OP_GATHER << LP_SAMPLER_OP_TYPE_SHIFT;
sample_key |= (instr->component << LP_SAMPLER_GATHER_COMP_SHIFT);
} else if (instr->op == nir_texop_lod)
} else if (instr->op == nir_texop_lod) {
sample_key |= LP_SAMPLER_OP_LODQ << LP_SAMPLER_OP_TYPE_SHIFT;
}
for (unsigned i = 0; i < instr->num_srcs; i++) {
switch (instr->src[i].src_type) {
case nir_tex_src_coord: {
LLVMValueRef coord = get_src(bld_base, instr->src[i].src);
if (coord_vals == 1)
if (coord_vals == 1) {
coords[0] = coord;
else {
} else {
for (unsigned chan = 0; chan < instr->coord_components; ++chan)
coords[chan] = LLVMBuildExtractValue(builder, coord,
chan, "");
}
for (unsigned chan = coord_vals; chan < 5; chan++)
for (unsigned chan = coord_vals; chan < 5; chan++) {
coords[chan] = coord_undef;
}
break;
}
case nir_tex_src_texture_deref:
@ -2445,13 +2467,24 @@ visit_tex(struct lp_build_nir_context *bld_base, nir_tex_instr *instr)
if (explicit_lod)
lod_property = lp_build_nir_lod_property(bld_base, instr->src[lod_src].src);
if (instr->op == nir_texop_tex || instr->op == nir_texop_tg4 || instr->op == nir_texop_txb ||
instr->op == nir_texop_txl || instr->op == nir_texop_txd || instr->op == nir_texop_lod)
switch (instr->op) {
case nir_texop_tex:
case nir_texop_tg4:
case nir_texop_txb:
case nir_texop_txl:
case nir_texop_txd:
case nir_texop_lod:
for (unsigned chan = 0; chan < coord_vals; ++chan)
coords[chan] = cast_type(bld_base, coords[chan], nir_type_float, 32);
else if (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)
break;
case nir_texop_txf:
case nir_texop_txf_ms:
for (unsigned chan = 0; chan < instr->coord_components; ++chan)
coords[chan] = cast_type(bld_base, coords[chan], nir_type_int, 32);
break;
default:
;
}
if (instr->is_array && instr->sampler_dim == GLSL_SAMPLER_DIM_1D) {
/* move layer coord for 1d arrays. */