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gallivm: misc clean-ups in lp_bld_nir.c
Use switch instead of if/else. Add some braces. 80-column wrapping, etc. Signed-off-by: Brian Paul <brianp@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20211>
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f3d2d076ed
1 changed files with 59 additions and 26 deletions
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@ -1566,10 +1566,14 @@ visit_load_ssbo(struct lp_build_nir_context *bld_base,
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nir_intrinsic_instr *instr,
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LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
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{
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LLVMValueRef idx = cast_type(bld_base, get_src(bld_base, instr->src[0]), nir_type_uint, 32);
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LLVMValueRef idx = cast_type(bld_base, get_src(bld_base, instr->src[0]),
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nir_type_uint, 32);
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LLVMValueRef offset = get_src(bld_base, instr->src[1]);
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bool index_and_offset_are_uniform = nir_src_is_always_uniform(instr->src[0]) && nir_src_is_always_uniform(instr->src[1]);
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bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
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bool index_and_offset_are_uniform =
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nir_src_is_always_uniform(instr->src[0]) &&
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nir_src_is_always_uniform(instr->src[1]);
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bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest),
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nir_dest_bit_size(instr->dest),
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index_and_offset_are_uniform, idx, offset, result);
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}
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@ -1579,13 +1583,17 @@ visit_store_ssbo(struct lp_build_nir_context *bld_base,
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nir_intrinsic_instr *instr)
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{
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LLVMValueRef val = get_src(bld_base, instr->src[0]);
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LLVMValueRef idx = cast_type(bld_base, get_src(bld_base, instr->src[1]), nir_type_uint, 32);
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LLVMValueRef idx = cast_type(bld_base, get_src(bld_base, instr->src[1]),
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nir_type_uint, 32);
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LLVMValueRef offset = get_src(bld_base, instr->src[2]);
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bool index_and_offset_are_uniform = nir_src_is_always_uniform(instr->src[1]) && nir_src_is_always_uniform(instr->src[2]);
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bool index_and_offset_are_uniform =
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nir_src_is_always_uniform(instr->src[1]) &&
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nir_src_is_always_uniform(instr->src[2]);
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int writemask = instr->const_index[0];
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int nc = nir_src_num_components(instr->src[0]);
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int bitsize = nir_src_bit_size(instr->src[0]);
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bld_base->store_mem(bld_base, writemask, nc, bitsize, index_and_offset_are_uniform, idx, offset, val);
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bld_base->store_mem(bld_base, writemask, nc, bitsize,
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index_and_offset_are_uniform, idx, offset, val);
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}
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@ -1820,6 +1828,7 @@ visit_image_samples(struct lp_build_nir_context *bld_base,
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bld_base->image_size(bld_base, ¶ms);
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}
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static void
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visit_shared_load(struct lp_build_nir_context *bld_base,
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nir_intrinsic_instr *instr,
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@ -1827,7 +1836,8 @@ visit_shared_load(struct lp_build_nir_context *bld_base,
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{
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LLVMValueRef offset = get_src(bld_base, instr->src[0]);
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bool offset_is_uniform = nir_src_is_always_uniform(instr->src[0]);
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bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
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bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest),
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nir_dest_bit_size(instr->dest),
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offset_is_uniform, NULL, offset, result);
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}
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@ -1842,7 +1852,8 @@ visit_shared_store(struct lp_build_nir_context *bld_base,
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int writemask = instr->const_index[1];
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int nc = nir_src_num_components(instr->src[0]);
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int bitsize = nir_src_bit_size(instr->src[0]);
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bld_base->store_mem(bld_base, writemask, nc, bitsize, offset_is_uniform, NULL, offset, val);
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bld_base->store_mem(bld_base, writemask, nc, bitsize,
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offset_is_uniform, NULL, offset, val);
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}
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@ -1858,7 +1869,8 @@ visit_shared_atomic(struct lp_build_nir_context *bld_base,
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if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap)
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val2 = get_src(bld_base, instr->src[2]);
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bld_base->atomic_mem(bld_base, instr->intrinsic, bitsize, NULL, offset, val, val2, &result[0]);
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bld_base->atomic_mem(bld_base, instr->intrinsic, bitsize, NULL,
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offset, val, val2, &result[0]);
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}
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@ -1904,7 +1916,8 @@ visit_load_global(struct lp_build_nir_context *bld_base,
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{
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LLVMValueRef addr = get_src(bld_base, instr->src[0]);
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bool offset_is_uniform = nir_src_is_always_uniform(instr->src[0]);
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bld_base->load_global(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
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bld_base->load_global(bld_base, nir_dest_num_components(instr->dest),
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nir_dest_bit_size(instr->dest),
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nir_src_bit_size(instr->src[0]),
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offset_is_uniform, addr, result);
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}
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@ -1948,9 +1961,11 @@ static void visit_shuffle(struct lp_build_nir_context *bld_base,
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LLVMValueRef dst[4])
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{
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LLVMValueRef src = get_src(bld_base, instr->src[0]);
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src = cast_type(bld_base, src, nir_type_int, nir_src_bit_size(instr->src[0]));
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src = cast_type(bld_base, src, nir_type_int,
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nir_src_bit_size(instr->src[0]));
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LLVMValueRef index = get_src(bld_base, instr->src[1]);
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index = cast_type(bld_base, index, nir_type_uint, nir_src_bit_size(instr->src[1]));
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index = cast_type(bld_base, index, nir_type_uint,
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nir_src_bit_size(instr->src[1]));
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bld_base->shuffle(bld_base, src, index, instr, dst);
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}
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@ -2254,6 +2269,7 @@ visit_txs(struct lp_build_nir_context *bld_base, nir_tex_instr *instr)
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LLVMValueRef sizes_out[NIR_MAX_VEC_COMPONENTS];
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LLVMValueRef explicit_lod = NULL;
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LLVMValueRef texture_unit_offset = NULL;
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for (unsigned i = 0; i < instr->num_srcs; i++) {
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switch (instr->src[i].src_type) {
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case nir_tex_src_lod:
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@ -2308,6 +2324,13 @@ lp_build_nir_lod_property(struct lp_build_nir_context *bld_base,
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static void
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visit_tex(struct lp_build_nir_context *bld_base, nir_tex_instr *instr)
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{
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if (instr->op == nir_texop_txs ||
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instr->op == nir_texop_query_levels ||
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instr->op == nir_texop_texture_samples) {
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visit_txs(bld_base, instr);
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return;
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}
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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LLVMBuilderRef builder = gallivm->builder;
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LLVMValueRef coords[5];
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@ -2326,31 +2349,30 @@ visit_tex(struct lp_build_nir_context *bld_base, nir_tex_instr *instr)
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memset(¶ms, 0, sizeof(params));
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enum lp_sampler_lod_property lod_property = LP_SAMPLER_LOD_SCALAR;
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if (instr->op == nir_texop_txs || instr->op == nir_texop_query_levels || instr->op == nir_texop_texture_samples) {
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visit_txs(bld_base, instr);
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return;
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}
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if (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)
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if (instr->op == nir_texop_txf ||
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instr->op == nir_texop_txf_ms) {
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sample_key |= LP_SAMPLER_OP_FETCH << LP_SAMPLER_OP_TYPE_SHIFT;
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else if (instr->op == nir_texop_tg4) {
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} else if (instr->op == nir_texop_tg4) {
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sample_key |= LP_SAMPLER_OP_GATHER << LP_SAMPLER_OP_TYPE_SHIFT;
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sample_key |= (instr->component << LP_SAMPLER_GATHER_COMP_SHIFT);
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} else if (instr->op == nir_texop_lod)
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} else if (instr->op == nir_texop_lod) {
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sample_key |= LP_SAMPLER_OP_LODQ << LP_SAMPLER_OP_TYPE_SHIFT;
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}
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for (unsigned i = 0; i < instr->num_srcs; i++) {
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switch (instr->src[i].src_type) {
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case nir_tex_src_coord: {
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LLVMValueRef coord = get_src(bld_base, instr->src[i].src);
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if (coord_vals == 1)
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if (coord_vals == 1) {
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coords[0] = coord;
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else {
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} else {
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for (unsigned chan = 0; chan < instr->coord_components; ++chan)
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coords[chan] = LLVMBuildExtractValue(builder, coord,
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chan, "");
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}
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for (unsigned chan = coord_vals; chan < 5; chan++)
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for (unsigned chan = coord_vals; chan < 5; chan++) {
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coords[chan] = coord_undef;
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}
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break;
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}
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case nir_tex_src_texture_deref:
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@ -2445,13 +2467,24 @@ visit_tex(struct lp_build_nir_context *bld_base, nir_tex_instr *instr)
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if (explicit_lod)
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lod_property = lp_build_nir_lod_property(bld_base, instr->src[lod_src].src);
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if (instr->op == nir_texop_tex || instr->op == nir_texop_tg4 || instr->op == nir_texop_txb ||
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instr->op == nir_texop_txl || instr->op == nir_texop_txd || instr->op == nir_texop_lod)
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switch (instr->op) {
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case nir_texop_tex:
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case nir_texop_tg4:
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case nir_texop_txb:
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case nir_texop_txl:
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case nir_texop_txd:
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case nir_texop_lod:
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for (unsigned chan = 0; chan < coord_vals; ++chan)
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coords[chan] = cast_type(bld_base, coords[chan], nir_type_float, 32);
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else if (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)
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break;
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case nir_texop_txf:
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case nir_texop_txf_ms:
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for (unsigned chan = 0; chan < instr->coord_components; ++chan)
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coords[chan] = cast_type(bld_base, coords[chan], nir_type_int, 32);
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break;
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default:
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;
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}
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if (instr->is_array && instr->sampler_dim == GLSL_SAMPLER_DIM_1D) {
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/* move layer coord for 1d arrays. */
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