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https://gitlab.freedesktop.org/mesa/mesa.git
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Track hardware vertex buffer state changes.
This commit is contained in:
parent
85c7683f1f
commit
f39a520892
4 changed files with 72 additions and 23 deletions
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@ -109,7 +109,7 @@ struct i915_state
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/** Describes the current hardware vertex layout */
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struct vertex_info vertex_info;
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unsigned id; /* track lost context events */
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};
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@ -185,6 +185,9 @@ struct i915_context
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unsigned *batch_start;
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/** Vertex buffer */
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struct pipe_buffer_handle *vbo;
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struct i915_state current;
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unsigned hardware_dirty;
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@ -211,6 +214,7 @@ struct i915_context
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#define I915_NEW_SAMPLER 0x400
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#define I915_NEW_TEXTURE 0x800
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#define I915_NEW_CONSTANTS 0x1000
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#define I915_NEW_VBO 0x2000
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/* Driver's internally generated state flags:
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@ -82,8 +82,6 @@ struct vbuf_stage {
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ushort *element_map;
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unsigned nr_elements;
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struct pipe_buffer_handle *buf;
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unsigned prim;
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struct i915_context *i915;
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@ -279,7 +277,6 @@ static void vbuf_draw( struct draw_stage *stage )
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unsigned vertex_size = i915->current.vertex_info.size * 4; /* in bytes */
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unsigned hwprim;
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unsigned i;
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unsigned *ptr;
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switch(vbuf->prim) {
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case PIPE_PRIM_POINTS:
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@ -304,7 +301,7 @@ static void vbuf_draw( struct draw_stage *stage )
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if (i915->hardware_dirty)
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i915_emit_hardware_state( i915 );
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if (!BEGIN_BATCH( 4 + (nr + 1)/2, 1 )) {
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if (!BEGIN_BATCH( 1 + (nr + 1)/2, 1 )) {
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FLUSH_BATCH();
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/* Make sure state is re-emitted after a flush:
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@ -312,20 +309,12 @@ static void vbuf_draw( struct draw_stage *stage )
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i915_update_derived( i915 );
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i915_emit_hardware_state( i915 );
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if (!BEGIN_BATCH( 4 + (nr + 1)/2, 1 )) {
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if (!BEGIN_BATCH( 1 + (nr + 1)/2, 1 )) {
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assert(0);
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return;
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}
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}
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/* FIXME: don't do this every time */
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OUT_BATCH( _3DSTATE_LOAD_STATE_IMMEDIATE_1 |
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I1_LOAD_S(0) |
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I1_LOAD_S(1) |
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(1));
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OUT_RELOC( vbuf->buf, I915_BUFFER_ACCESS_READ, 0 );
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OUT_BATCH( ((vertex_size/4) << 24) | /* vertex size in dwords */
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((vertex_size/4) << 16) ); /* vertex pitch in dwords */
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OUT_BATCH( _3DPRIMITIVE |
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PRIM_INDIRECT |
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hwprim |
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@ -361,7 +350,7 @@ static void vbuf_flush_elements( struct draw_stage *stage )
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vbuf->nr_elements = 0;
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winsys->buffer_unmap(winsys, vbuf->buf);
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winsys->buffer_unmap(winsys, i915->vbo);
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vbuf->nr_vertices = 0;
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@ -375,13 +364,16 @@ static void vbuf_flush_elements( struct draw_stage *stage )
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}
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/* FIXME: handle failure */
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if(!vbuf->buf)
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vbuf->buf = winsys->buffer_create(winsys, 64);
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winsys->buffer_data( winsys, vbuf->buf,
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if(!i915->vbo)
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i915->vbo = winsys->buffer_create(winsys, 64);
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winsys->buffer_data( winsys, i915->vbo,
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VBUF_SIZE, NULL,
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I915_BUFFER_USAGE_LIT_VERTEX );
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i915->dirty |= I915_NEW_VBO;
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vbuf->vertex_map = winsys->buffer_map(winsys,
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vbuf->buf,
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i915->vbo,
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PIPE_BUFFER_FLAG_WRITE );
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vbuf->vertex_ptr = vbuf->vertex_map;
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@ -394,7 +386,9 @@ static void vbuf_flush_elements( struct draw_stage *stage )
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static void vbuf_begin( struct draw_stage *stage )
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{
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struct vbuf_stage *vbuf = vbuf_stage(stage);
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struct i915_context *i915 = vbuf->i915;
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assert(!i915->dirty);
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vbuf->vertex_size = vbuf->i915->current.vertex_info.size * 4;
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}
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@ -62,7 +62,7 @@ i915_emit_hardware_state(struct i915_context *i915 )
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{
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/* XXX: there must be an easier way */
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const unsigned dwords = ( 14 +
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5 +
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7 +
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I915_MAX_DYNAMIC +
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8 +
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2 + I915_TEX_UNITS*3 +
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@ -72,7 +72,7 @@ i915_emit_hardware_state(struct i915_context *i915 )
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6
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) * 3/2; /* plus 50% margin */
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const unsigned relocs = ( I915_TEX_UNITS +
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2
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3
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) * 3/2; /* plus 50% margin */
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#if 0
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@ -134,16 +134,26 @@ i915_emit_hardware_state(struct i915_context *i915 )
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OUT_BATCH(0);
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}
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/* 5 dwords, 0 relocs */
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/* 7 dwords, 1 relocs */
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if (i915->hardware_dirty & I915_HW_IMMEDIATE)
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{
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OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
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I1_LOAD_S(0) |
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I1_LOAD_S(1) |
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I1_LOAD_S(2) |
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I1_LOAD_S(4) |
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I1_LOAD_S(5) |
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I1_LOAD_S(6) |
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(3));
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(5));
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if(i915->vbo)
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OUT_RELOC(i915->vbo,
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I915_BUFFER_ACCESS_READ,
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i915->current.immediate[I915_IMMEDIATE_S0]);
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else
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/* FIXME: we should not do this */
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OUT_BATCH(0);
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OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S1]);
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OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S2]);
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OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S4]);
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OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S5]);
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@ -45,6 +45,46 @@
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/***********************************************************************
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* S0,S1: Vertex buffer state.
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*/
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static void upload_S0S1(struct i915_context *i915)
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{
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unsigned LIS0, LIS1;
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/* INTEL_NEW_VBO */
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/* TODO: re-use vertex buffers here? */
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LIS0 = 0;
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/* INTEL_NEW_VERTEX_SIZE -- do this where the vertex size is calculated!
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*/
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{
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unsigned vertex_size = i915->current.vertex_info.size;
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LIS1 = ((vertex_size << 24) |
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(vertex_size << 16));
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}
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/* INTEL_NEW_VBO */
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/* TODO: use a vertex generation number to track vbo changes */
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if (1 ||
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i915->current.immediate[I915_IMMEDIATE_S0] != LIS0 ||
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i915->current.immediate[I915_IMMEDIATE_S1] != LIS1)
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{
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i915->current.immediate[I915_IMMEDIATE_S0] = LIS0;
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i915->current.immediate[I915_IMMEDIATE_S1] = LIS1;
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i915->hardware_dirty |= I915_HW_IMMEDIATE;
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}
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}
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const struct i915_tracked_state i915_upload_S0S1 = {
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.dirty = I915_NEW_VBO | I915_NEW_VERTEX_FORMAT,
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.update = upload_S0S1
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};
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/***********************************************************************
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* S4: Vertex format, rasterization state
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*/
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@ -166,6 +206,7 @@ const struct i915_tracked_state i915_upload_S7 = {
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static const struct i915_tracked_state *atoms[] = {
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&i915_upload_S0S1,
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&i915_upload_S2S4,
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&i915_upload_S5,
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&i915_upload_S6,
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