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nouveau: header update

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This commit is contained in:
Ben Skeggs 2007-12-26 00:56:00 +11:00
parent e32e0e2b8e
commit f33467d72a
4 changed files with 2609 additions and 2317 deletions
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17
src/mesa/drivers/dri/nouveau_winsys/nv04_surface.c
View file

@ -40,7 +40,7 @@ nv04_surface_copy_m2mf(struct nouveau_context *nv, unsigned dx, unsigned dy,
while (h) {
int count = (h > 2047) ? 2047 : h;
BEGIN_RING(NvM2MF, NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
BEGIN_RING(NvM2MF, NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
OUT_RELOCl(src->buffer, src_offset, NOUVEAU_BO_VRAM |
NOUVEAU_BO_GART | NOUVEAU_BO_RD);
OUT_RELOCl(dst->buffer, dst_offset, NOUVEAU_BO_VRAM |
@ -81,7 +81,8 @@ nv04_surface_copy_prep(struct nouveau_context *nv, struct pipe_surface *dst,
* to NV_MEMORY_TO_MEMORY_FORMAT in this case.
*/
if ((src->offset & 63) || (dst->offset & 63)) {
BEGIN_RING(NvM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN, 2);
BEGIN_RING(NvM2MF,
NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN, 2);
OUT_RELOCo(src->buffer, NOUVEAU_BO_GART | NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD);
OUT_RELOCo(dst->buffer, NOUVEAU_BO_GART | NOUVEAU_BO_VRAM |
@ -179,7 +180,7 @@ nouveau_surface_init_nv04(struct nouveau_context *nv)
return 1;
}
BIND_RING (NvM2MF, nv->next_subchannel++);
BEGIN_RING(NvM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1);
BEGIN_RING(NvM2MF, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1);
OUT_RING (nv->sync_notifier->handle);
class = nv->chipset < 0x10 ? NV04_CONTEXT_SURFACES_2D :
@ -194,7 +195,7 @@ nouveau_surface_init_nv04(struct nouveau_context *nv)
OUT_RING (nv->channel->vram->handle);
OUT_RING (nv->channel->vram->handle);
class = nv->chipset < 0x10 ? NV_IMAGE_BLIT :
class = nv->chipset < 0x10 ? NV04_IMAGE_BLIT :
NV12_IMAGE_BLIT;
if ((ret = nouveau_grobj_alloc(nv->channel, nv->next_handle++, class,
&nv->NvImageBlit))) {
@ -202,12 +203,12 @@ nouveau_surface_init_nv04(struct nouveau_context *nv)
return 1;
}
BIND_RING (NvImageBlit, nv->next_subchannel++);
BEGIN_RING(NvImageBlit, NV_IMAGE_BLIT_DMA_NOTIFY, 1);
BEGIN_RING(NvImageBlit, NV04_IMAGE_BLIT_DMA_NOTIFY, 1);
OUT_RING (nv->sync_notifier->handle);
BEGIN_RING(NvImageBlit, NV_IMAGE_BLIT_SURFACE, 1);
BEGIN_RING(NvImageBlit, NV04_IMAGE_BLIT_SURFACE, 1);
OUT_RING (nv->NvCtxSurf2D->handle);
BEGIN_RING(NvImageBlit, NV_IMAGE_BLIT_OPERATION, 1);
OUT_RING (NV_IMAGE_BLIT_OPERATION_SRCCOPY);
BEGIN_RING(NvImageBlit, NV04_IMAGE_BLIT_OPERATION, 1);
OUT_RING (NV04_IMAGE_BLIT_OPERATION_SRCCOPY);
class = NV04_GDI_RECTANGLE_TEXT;
if ((ret = nouveau_grobj_alloc(nv->channel, nv->next_handle++, class,

4890
src/mesa/pipe/nouveau/nouveau_class.h
View file

File diff suppressed because it is too large Load diff

3
src/mesa/pipe/nv40/nv40_state.c
View file

@ -425,8 +425,7 @@ nv40_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *hwcso)
BEGIN_RING(curie, NV40TCL_DEPTH_FUNC, 3);
OUT_RINGp ((uint32_t *)&hw->depth, 3);
/*XXX: fix in nouveau_class.h, faces backwards.. */
BEGIN_RING(curie, NV40TCL_STENCIL_BACK_ENABLE, 16);
BEGIN_RING(curie, NV40TCL_STENCIL_FRONT_ENABLE, 16);
OUT_RINGp ((uint32_t *)&hw->stencil.front, 8);
OUT_RINGp ((uint32_t *)&hw->stencil.back, 8);
BEGIN_RING(curie, NV40TCL_ALPHA_TEST_ENABLE, 3);

16
src/mesa/pipe/nv40/nv40_vbo.c
View file

@ -175,11 +175,12 @@ nv40_vbo_validate_state(struct nv40_context *nv40,
}
if (ib) {
BEGIN_RING(curie, 0x181c, 2);
BEGIN_RING(curie, NV40TCL_IDXBUF_ADDRESS, 2);
OUT_RELOCl(ib, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
NOUVEAU_BO_RD);
OUT_RELOCd(ib, ib_format, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
NOUVEAU_BO_RD | NOUVEAU_BO_OR, 0, 1);
NOUVEAU_BO_RD | NOUVEAU_BO_OR,
0, NV40TCL_IDXBUF_FORMAT_DMA1);
}
BEGIN_RING(curie, 0x1710, 1);
@ -342,26 +343,27 @@ nv40_draw_elements_vbo(struct pipe_context *pipe,
unsigned mode, unsigned start, unsigned count)
{
struct nv40_context *nv40 = (struct nv40_context *)pipe;
unsigned nr;
unsigned nr, type;
switch (ib_size) {
case 2:
assert(nv40_vbo_validate_state(nv40, ib, 0x00000010));
type = NV40TCL_IDXBUF_FORMAT_TYPE_U16;
break;
case 4:
assert(nv40_vbo_validate_state(nv40, ib, 0x00000000));
type = NV40TCL_IDXBUF_FORMAT_TYPE_U32;
break;
default:
assert(0);
}
assert(nv40_vbo_validate_state(nv40, ib, type));
BEGIN_RING(curie, NV40TCL_BEGIN_END, 1);
OUT_RING (nvgl_primitive(mode));
nr = (count & 0xff);
if (nr) {
BEGIN_RING(curie, 0x1824, 1);
BEGIN_RING(curie, NV40TCL_VB_INDEX_BATCH, 1);
OUT_RING (((nr - 1) << 24) | start);
start += nr;
}
@ -372,7 +374,7 @@ nv40_draw_elements_vbo(struct pipe_context *pipe,
nr -= push;
BEGIN_RING_NI(curie, 0x1824, push);
BEGIN_RING_NI(curie, NV40TCL_VB_INDEX_BATCH, push);
while (push--) {
OUT_RING(((0x100 - 1) << 24) | start);
start += 0x100;