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anv: implement Wa_14015946265 for DG2

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SOL unit issues, wa is to send PC with CS stall after SO_DECL.

v2: emit also in genX_gpu_memcpy (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18409>
This commit is contained in:
Tapani Pälli 2022-09-05 08:23:20 +03:00 • committed by Marge Bot
parent e37f534d7f
commit f32ac1d30b
2 changed files with 14 additions and 0 deletions
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7
src/intel/vulkan/genX_gpu_memcpy.c
View file

@ -184,6 +184,13 @@ emit_so_memcpy(struct anv_batch *batch, struct anv_device *device,
},
});
#if GFX_VERx10 == 125
/* Wa_14015946265: Send PC with CS stall after SO_DECL. */
anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) {
pc.CommandStreamerStallEnable = true;
}
#endif
anv_batch_emit(batch, GENX(3DSTATE_STREAMOUT), so) {
so.SOFunctionEnable = true;
so.RenderingDisable = true;

7
src/intel/vulkan/genX_pipeline.c
View file

@ -1241,6 +1241,13 @@ emit_3dstate_streamout(struct anv_graphics_pipeline *pipeline,
.Stream3Decl = so_decl[3][i],
});
}
#if GFX_VERx10 == 125
/* Wa_14015946265: Send PC with CS stall after SO_DECL. */
anv_batch_emit(&pipeline->base.batch, GENX(PIPE_CONTROL), pc) {
pc.CommandStreamerStallEnable = true;
}
#endif
}
struct GENX(3DSTATE_STREAMOUT) so = {