mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
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brw: Use ralloc helpers for string handling in brw_eu_validate
Acked-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36339>
This commit is contained in:
Caio Oliveira
Marge Bot
parent
904a4ab364
commit
f2a49081de
1 changed files with 109 additions and 155 deletions
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@ -38,7 +38,6 @@
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* test_eu_validate.cpp) will be rejected.
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*/
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#include <stdlib.h>
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#include "brw_eu.h"
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#include "brw_disasm_info.h"
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@ -97,48 +96,38 @@ typedef struct brw_hw_decoded_inst {
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} src[3];
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} brw_hw_decoded_inst;
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/* We're going to do lots of string concatenation, so this should help. */
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struct string {
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char *str;
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size_t len;
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struct error {
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char *msg;
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};
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static void
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cat(struct string *dest, const struct string src)
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report_error(struct error *error, const char *msg)
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{
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dest->str = realloc(dest->str, dest->len + src.len + 1);
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memcpy(dest->str + dest->len, src.str, src.len);
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dest->str[dest->len + src.len] = '\0';
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dest->len = dest->len + src.len;
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}
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#define CAT(dest, src) cat(&dest, (struct string){src, strlen(src)})
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assert(error);
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static bool
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contains(const struct string haystack, const struct string needle)
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{
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return haystack.str && memmem(haystack.str, haystack.len,
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needle.str, needle.len) != NULL;
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if (error->msg) {
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/* Ignore duplicate reports. */
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if (strstr(error->msg, msg))
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return;
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ralloc_asprintf_append(&error->msg, "\tERROR: %s\n", msg);
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} else {
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error->msg = ralloc_asprintf(NULL, "\tERROR: %s\n", msg);
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}
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}
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#define CONTAINS(haystack, needle) \
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contains(haystack, (struct string){needle, strlen(needle)})
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#define error(str) "\tERROR: " str "\n"
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#define ERROR_INDENT "\t "
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#define ERROR(msg) ERROR_IF(true, msg)
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#define ERROR_IF(cond, msg) \
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do { \
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if ((cond) && !CONTAINS(error_msg, error(msg))) { \
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CAT(error_msg, error(msg)); \
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} \
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if ((cond)) \
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report_error(error, msg); \
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} while(0)
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#define RETURN_ERROR(msg) RETURN_ERROR_IF(true, msg)
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#define RETURN_ERROR_IF(cond, msg) \
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do { \
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if ((cond) && !CONTAINS(error_msg, error(msg))) { \
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CAT(error_msg, error(msg)); \
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return error_msg; \
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if ((cond)) { \
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report_error(error, msg); \
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return; \
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} \
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} while(0)
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@ -248,13 +237,12 @@ src_has_scalar_region(const brw_hw_decoded_inst *inst, int src)
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inst->src[src].hstride == 0;
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}
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static struct string
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invalid_values(const struct brw_isa_info *isa, const brw_hw_decoded_inst *inst)
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static void
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invalid_values(const struct brw_isa_info *isa, const brw_hw_decoded_inst *inst,
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struct error *error)
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{
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const struct intel_device_info *devinfo = isa->devinfo;
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struct string error_msg = { .str = NULL, .len = 0 };
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if (devinfo->ver >= 12) {
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unsigned qtr_ctrl = brw_eu_inst_qtr_control(devinfo, inst->raw);
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unsigned nib_ctrl =
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@ -264,35 +252,30 @@ invalid_values(const struct brw_isa_info *isa, const brw_hw_decoded_inst *inst)
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ERROR_IF(chan_off % inst->exec_size != 0,
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"The execution size must be a factor of the chosen offset");
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}
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return error_msg;
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}
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static struct string
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static void
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sources_not_null(const struct brw_isa_info *isa,
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const brw_hw_decoded_inst *inst)
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const brw_hw_decoded_inst *inst,
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struct error *error)
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{
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struct string error_msg = { .str = NULL, .len = 0 };
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/* Nothing to test. 3-src instructions can only have GRF sources, and
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* there's no bit to control the file.
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*/
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if (inst->num_sources == 3)
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return (struct string){};
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return;
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/* Nothing to test. Split sends can only encode a file in sources that are
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* allowed to be NULL.
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*/
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if (inst_is_split_send(isa, inst))
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return (struct string){};
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return;
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if (inst->num_sources >= 1 && inst->opcode != BRW_OPCODE_SYNC)
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ERROR_IF(src0_is_null(inst), "src0 is null");
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if (inst->num_sources == 2)
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ERROR_IF(src1_is_null(inst), "src1 is null");
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return error_msg;
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}
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static bool
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@ -314,14 +297,13 @@ inst_uses_src_acc(const struct brw_isa_info *isa,
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return src0_is_acc(inst) || (inst->num_sources > 1 && src1_is_acc(inst));
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}
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static struct string
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static void
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send_restrictions(const struct brw_isa_info *isa,
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const brw_hw_decoded_inst *inst)
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const brw_hw_decoded_inst *inst,
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struct error *error)
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{
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const struct intel_device_info *devinfo = isa->devinfo;
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struct string error_msg = { .str = NULL, .len = 0 };
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if (inst_is_split_send(isa, inst)) {
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ERROR_IF(inst->src[1].file == ARF &&
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inst->src[1].nr != BRW_ARF_NULL,
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@ -377,8 +359,6 @@ send_restrictions(const struct brw_isa_info *isa,
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"a src and dest overlap");
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}
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}
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return error_msg;
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}
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static bool
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@ -634,16 +614,15 @@ is_byte_conversion(const struct brw_isa_info *isa,
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* Checks restrictions listed in "General Restrictions Based on Operand Types"
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* in the "Register Region Restrictions" section.
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*/
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static struct string
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static void
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general_restrictions_based_on_operand_types(const struct brw_isa_info *isa,
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const brw_hw_decoded_inst *inst)
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const brw_hw_decoded_inst *inst,
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struct error *error)
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{
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const struct intel_device_info *devinfo = isa->devinfo;
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struct string error_msg = { .str = NULL, .len = 0 };
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if (inst_is_send(inst))
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return error_msg;
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return;
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if (devinfo->ver >= 11) {
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/* A register type of B or UB for DPAS actually means 4 bytes packed into
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@ -718,13 +697,13 @@ general_restrictions_based_on_operand_types(const struct brw_isa_info *isa,
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}
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if (inst->num_sources == 3)
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return error_msg;
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return;
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if (inst->exec_size == 1)
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return error_msg;
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return;
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if (!inst->has_dst)
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return error_msg;
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return;
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if (inst->opcode == BRW_OPCODE_MATH &&
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intel_needs_workaround(devinfo, 22016140776)) {
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@ -770,9 +749,8 @@ general_restrictions_based_on_operand_types(const struct brw_isa_info *isa,
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if (dst_type_is_byte) {
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if (is_packed(inst->exec_size * dst_stride, inst->exec_size, dst_stride)) {
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if (!inst_is_raw_move(inst))
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ERROR("Only raw MOV supports a packed-byte destination");
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return error_msg;
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ERROR_IF(!inst_is_raw_move(inst),
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"Only raw MOV supports a packed-byte destination");
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}
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}
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@ -922,30 +900,27 @@ general_restrictions_based_on_operand_types(const struct brw_isa_info *isa,
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}
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}
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}
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return error_msg;
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}
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/**
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* Checks restrictions listed in "General Restrictions on Regioning Parameters"
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* in the "Register Region Restrictions" section.
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*/
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static struct string
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static void
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general_restrictions_on_region_parameters(const struct brw_isa_info *isa,
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const brw_hw_decoded_inst *inst)
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const brw_hw_decoded_inst *inst,
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struct error *error)
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{
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const struct intel_device_info *devinfo = isa->devinfo;
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struct string error_msg = { .str = NULL, .len = 0 };
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if (inst->num_sources == 3)
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return (struct string){};
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return;
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/* Split sends don't have the bits in the instruction to encode regions so
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* there's nothing to check.
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*/
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if (inst_is_split_send(isa, inst))
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return (struct string){};
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return;
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if (inst->access_mode == BRW_ALIGN_16) {
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if (inst->has_dst && !dst_is_null(inst))
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@ -968,7 +943,7 @@ general_restrictions_on_region_parameters(const struct brw_isa_info *isa,
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"In Align16 mode, only VertStride of 0, 2, or 4 is allowed");
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}
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return error_msg;
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return;
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}
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for (unsigned i = 0; i < inst->num_sources; i++) {
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@ -1060,8 +1035,6 @@ general_restrictions_on_region_parameters(const struct brw_isa_info *isa,
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ERROR_IF(inst->dst.hstride == 0,
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"Destination Horizontal Stride must not be 0");
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}
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return error_msg;
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}
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static bool
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@ -1079,17 +1052,16 @@ is_multiplier_instruction(const brw_hw_decoded_inst *inst)
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}
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}
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static struct string
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static void
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special_restrictions_for_mixed_float_mode(const struct brw_isa_info *isa,
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const brw_hw_decoded_inst *inst)
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const brw_hw_decoded_inst *inst,
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struct error *error)
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{
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const struct intel_device_info *devinfo = isa->devinfo;
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struct string error_msg = { .str = NULL, .len = 0 };
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/* See instruction_restrictions() for DPAS operand type validation. */
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if (inst->opcode == BRW_OPCODE_DPAS)
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return error_msg;
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return;
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ERROR_IF(is_pure_bfloat(inst),
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"Instructions with pure bfloat16 operands are not supported.");
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@ -1147,10 +1119,10 @@ special_restrictions_for_mixed_float_mode(const struct brw_isa_info *isa,
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const unsigned opcode = inst->opcode;
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if (inst->num_sources >= 3)
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return error_msg;
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return;
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if (!is_mixed_float(inst))
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return error_msg;
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return;
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bool is_align16 = inst->access_mode == BRW_ALIGN_16;
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@ -1348,8 +1320,6 @@ special_restrictions_for_mixed_float_mode(const struct brw_isa_info *isa,
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"of 2 on the destination");
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}
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}
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return error_msg;
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}
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/**
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@ -1437,22 +1407,24 @@ registers_read(const uint8_t grfs_accessed[static 32])
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* Checks restrictions listed in "Region Alignment Rules" in the "Register
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* Region Restrictions" section.
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*/
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static struct string
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static void
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region_alignment_rules(const struct brw_isa_info *isa,
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const brw_hw_decoded_inst *inst)
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const brw_hw_decoded_inst *inst,
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struct error *error)
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{
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const struct intel_device_info *devinfo = isa->devinfo;
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uint8_t dst_access_mask[32] = {}, src_access_mask[2][32] = {};
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struct string error_msg = { .str = NULL, .len = 0 };
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if (inst->num_sources == 3)
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return (struct string){};
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return;
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if (inst->access_mode == BRW_ALIGN_16)
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return (struct string){};
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return;
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if (inst_is_send(inst))
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return (struct string){};
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return;
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bool skip_detailed_grf_checks = false;
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for (unsigned i = 0; i < inst->num_sources; i++) {
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/* In Direct Addressing mode, a source cannot span more than 2 adjacent
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@ -1479,23 +1451,28 @@ region_alignment_rules(const struct brw_isa_info *isa,
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unsigned hstride_elements = (num_hstride - 1) * hstride;
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unsigned offset = (vstride_elements + hstride_elements) * element_size +
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subreg;
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ERROR_IF(offset >= 64 * reg_unit(devinfo),
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"A source cannot span more than 2 adjacent GRF registers");
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if (offset >= 64 * reg_unit(devinfo)) {
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ERROR("A source cannot span more than 2 adjacent GRF registers");
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skip_detailed_grf_checks = true;
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}
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}
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if (!inst->has_dst || dst_is_null(inst))
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return error_msg;
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return;
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unsigned stride = inst->dst.hstride;
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enum brw_reg_type dst_type = inst->dst.type;
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unsigned element_size = brw_type_size_bytes(dst_type);
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unsigned subreg = inst->dst.subnr;
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unsigned offset = ((inst->exec_size - 1) * stride * element_size) + subreg;
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ERROR_IF(offset >= 64 * reg_unit(devinfo),
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"A destination cannot span more than 2 adjacent GRF registers");
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if (offset >= 64 * reg_unit(devinfo)) {
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ERROR("A destination cannot span more than 2 adjacent GRF registers");
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skip_detailed_grf_checks = true;
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}
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if (error_msg.str)
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return error_msg;
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if (skip_detailed_grf_checks)
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return;
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grfs_accessed(devinfo, dst_access_mask, inst->exec_size, element_size, subreg,
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inst->exec_size == 1 ? 0 : inst->exec_size * stride,
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@ -1530,25 +1507,23 @@ region_alignment_rules(const struct brw_isa_info *isa,
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"destination registers");
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}
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}
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return error_msg;
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}
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static struct string
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static void
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vector_immediate_restrictions(const struct brw_isa_info *isa,
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const brw_hw_decoded_inst *inst)
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const brw_hw_decoded_inst *inst,
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struct error *error)
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{
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const struct intel_device_info *devinfo = isa->devinfo;
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struct string error_msg = { .str = NULL, .len = 0 };
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if (inst->num_sources == 3 || inst->num_sources == 0 ||
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(devinfo->ver >= 12 && inst_is_send(inst)))
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return (struct string){};
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return;
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unsigned file = inst->src[inst->num_sources == 1 ? 0 : 1].file;
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if (file != IMM)
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return (struct string){};
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return;
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enum brw_reg_type dst_type = inst->dst.type;
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unsigned dst_type_size = brw_type_size_bytes(dst_type);
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@ -1588,25 +1563,22 @@ vector_immediate_restrictions(const struct brw_isa_info *isa,
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default:
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break;
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}
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return error_msg;
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}
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static struct string
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static void
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special_requirements_for_handling_double_precision_data_types(
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const struct brw_isa_info *isa,
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const brw_hw_decoded_inst *inst)
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const brw_hw_decoded_inst *inst,
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struct error *error)
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{
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const struct intel_device_info *devinfo = isa->devinfo;
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struct string error_msg = { .str = NULL, .len = 0 };
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if (inst->num_sources == 3 || inst->num_sources == 0)
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return (struct string){};
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return;
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/* Split sends don't have types so there's no doubles there. */
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if (inst_is_split_send(isa, inst))
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return (struct string){};
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return;
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enum brw_reg_type exec_type = execution_type(inst);
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unsigned exec_type_size = brw_type_size_bytes(exec_type);
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@ -1812,16 +1784,14 @@ special_requirements_for_handling_double_precision_data_types(
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brw_eu_inst_no_dd_clear(devinfo, inst->raw),
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"DepCtrl is not allowed when the execution type is 64-bit");
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}
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return error_msg;
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}
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static struct string
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static void
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instruction_restrictions(const struct brw_isa_info *isa,
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const brw_hw_decoded_inst *inst)
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const brw_hw_decoded_inst *inst,
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struct error *error)
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{
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const struct intel_device_info *devinfo = isa->devinfo;
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struct string error_msg = { .str = NULL, .len = 0 };
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/* From Wa_1604601757:
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*
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@ -2253,27 +2223,25 @@ instruction_restrictions(const struct brw_isa_info *isa,
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* instructions, the boundaries of a register should not be crossed.
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*/
|
||||
}
|
||||
|
||||
return error_msg;
|
||||
}
|
||||
|
||||
static struct string
|
||||
static void
|
||||
send_descriptor_restrictions(const struct brw_isa_info *isa,
|
||||
const brw_hw_decoded_inst *inst)
|
||||
const brw_hw_decoded_inst *inst,
|
||||
struct error *error)
|
||||
{
|
||||
const struct intel_device_info *devinfo = isa->devinfo;
|
||||
struct string error_msg = { .str = NULL, .len = 0 };
|
||||
|
||||
if (inst_is_split_send(isa, inst)) {
|
||||
/* We can only validate immediate descriptors */
|
||||
if (brw_eu_inst_send_sel_reg32_desc(devinfo, inst->raw))
|
||||
return error_msg;
|
||||
return;
|
||||
} else if (inst_is_send(inst)) {
|
||||
/* We can only validate immediate descriptors */
|
||||
if (inst->src[1].file != IMM)
|
||||
return error_msg;
|
||||
return;
|
||||
} else {
|
||||
return error_msg;
|
||||
return;
|
||||
}
|
||||
|
||||
const uint32_t desc = brw_eu_inst_send_desc(devinfo, inst->raw);
|
||||
|
|
@ -2324,16 +2292,14 @@ send_descriptor_restrictions(const struct brw_isa_info *isa,
|
|||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return error_msg;
|
||||
}
|
||||
|
||||
static struct string
|
||||
static void
|
||||
register_region_special_restrictions(const struct brw_isa_info *isa,
|
||||
const brw_hw_decoded_inst *inst)
|
||||
const brw_hw_decoded_inst *inst,
|
||||
struct error *error)
|
||||
{
|
||||
const struct intel_device_info *devinfo = isa->devinfo;
|
||||
struct string error_msg = { .str = NULL, .len = 0 };
|
||||
|
||||
bool format_uses_regions = inst->format == FORMAT_BASIC ||
|
||||
inst->format == FORMAT_BASIC_THREE_SRC;
|
||||
|
|
@ -2476,16 +2442,14 @@ register_region_special_restrictions(const struct brw_isa_info *isa,
|
|||
ERROR_IF(!allowed,
|
||||
"Invalid register region for source 1. See special restrictions section.");
|
||||
}
|
||||
|
||||
return error_msg;
|
||||
}
|
||||
|
||||
static struct string
|
||||
static void
|
||||
scalar_register_restrictions(const struct brw_isa_info *isa,
|
||||
const brw_hw_decoded_inst *inst)
|
||||
const brw_hw_decoded_inst *inst,
|
||||
struct error *error)
|
||||
{
|
||||
const struct intel_device_info *devinfo = isa->devinfo;
|
||||
struct string error_msg = { .str = NULL, .len = 0 };
|
||||
|
||||
/* Restrictions from BSpec 71168 (r55736). */
|
||||
|
||||
|
|
@ -2557,8 +2521,6 @@ scalar_register_restrictions(const struct brw_isa_info *isa,
|
|||
(inst->src[2].file == ARF && inst->src[2].nr == BRW_ARF_SCALAR))
|
||||
ERROR("Scalar register not available before Gfx30.");
|
||||
}
|
||||
|
||||
return error_msg;
|
||||
}
|
||||
|
||||
static unsigned
|
||||
|
|
@ -2595,13 +2557,12 @@ brw_implied_width_for_3src_a1(unsigned v, unsigned h)
|
|||
return v/h;
|
||||
}
|
||||
|
||||
static struct string
|
||||
static void
|
||||
brw_hw_decode_inst(const struct brw_isa_info *isa,
|
||||
brw_hw_decoded_inst *inst,
|
||||
const brw_eu_inst *raw)
|
||||
const brw_eu_inst *raw, struct error *error)
|
||||
{
|
||||
const struct intel_device_info *devinfo = isa->devinfo;
|
||||
struct string error_msg = { .str = NULL, .len = 0 };
|
||||
|
||||
inst->raw = raw;
|
||||
inst->opcode = brw_eu_inst_opcode(isa, raw);
|
||||
|
|
@ -2933,8 +2894,6 @@ brw_hw_decode_inst(const struct brw_isa_info *isa,
|
|||
inst->cond_modifier = brw_eu_inst_cond_modifier(devinfo, raw);
|
||||
}
|
||||
}
|
||||
|
||||
return error_msg;
|
||||
}
|
||||
|
||||
bool
|
||||
|
|
@ -2943,27 +2902,20 @@ brw_validate_instruction(const struct brw_isa_info *isa,
|
|||
unsigned inst_size,
|
||||
struct disasm_info *disasm)
|
||||
{
|
||||
struct string error_msg = { .str = NULL, .len = 0 };
|
||||
struct error error = {};
|
||||
|
||||
if (is_unsupported_inst(isa, inst)) {
|
||||
ERROR("Instruction not supported on this Gen");
|
||||
report_error(&error, "Instruction not supported on this Gfx version");
|
||||
} else {
|
||||
brw_hw_decoded_inst decoded = {};
|
||||
error_msg = brw_hw_decode_inst(isa, &decoded, inst);
|
||||
brw_hw_decode_inst(isa, &decoded, inst, &error);
|
||||
|
||||
#define CHECK(func, args...) \
|
||||
do { \
|
||||
struct string __msg = func(isa, &decoded, ##args); \
|
||||
if (__msg.str) { \
|
||||
cat(&error_msg, __msg); \
|
||||
free(__msg.str); \
|
||||
} \
|
||||
} while (0)
|
||||
#define CHECK(func, args...) func(isa, &decoded, &error, ##args);
|
||||
|
||||
if (error_msg.str == NULL)
|
||||
if (!error.msg)
|
||||
CHECK(invalid_values);
|
||||
|
||||
if (error_msg.str == NULL) {
|
||||
if (!error.msg) {
|
||||
CHECK(sources_not_null);
|
||||
CHECK(send_restrictions);
|
||||
CHECK(general_restrictions_based_on_operand_types);
|
||||
|
|
@ -2981,12 +2933,14 @@ brw_validate_instruction(const struct brw_isa_info *isa,
|
|||
#undef CHECK
|
||||
}
|
||||
|
||||
if (error_msg.str && disasm) {
|
||||
disasm_insert_error(disasm, offset, inst_size, error_msg.str);
|
||||
if (error.msg) {
|
||||
if (disasm)
|
||||
disasm_insert_error(disasm, offset, inst_size, error.msg);
|
||||
ralloc_free(error.msg);
|
||||
return false;
|
||||
} else {
|
||||
return true;
|
||||
}
|
||||
free(error_msg.str);
|
||||
|
||||
return error_msg.len == 0;
|
||||
}
|
||||
|
||||
bool
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue