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pvr, pco: temporary initial scratch memory support
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com> Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>
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7 changed files with 160 additions and 1 deletions
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@ -199,6 +199,9 @@ typedef struct _pco_common_data {
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unsigned spilled_temps;
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pco_range spill_info; /* addr_lo, addr_hi, block_size */
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unsigned scratch;
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pco_range scratch_info; /* addr_lo, addr_hi, block_size */
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unsigned coeffs; /** Number of allocated coefficient registers. */
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unsigned shareds; /** Number of allocated shared registers. */
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@ -350,6 +350,8 @@ static void gather_common_data(nir_shader *nir, pco_data *data)
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gather_common_data_pass,
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nir_metadata_all,
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data);
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data->common.scratch = nir->scratch_size;
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}
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/**
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@ -536,6 +538,17 @@ void pco_preprocess_nir(pco_ctx *ctx, nir_shader *nir)
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NIR_PASS(_, nir, nir_lower_vars_to_ssa);
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if (!nir->info.internal) {
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/* TODO: test with different size_threshold values. */
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NIR_PASS(_,
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nir,
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nir_lower_vars_to_scratch,
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nir_var_function_temp,
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8,
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glsl_get_natural_size_align_bytes,
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glsl_get_word_size_align_bytes);
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}
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NIR_PASS(_,
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nir,
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nir_lower_indirect_derefs,
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@ -1195,6 +1195,85 @@ static pco_instr *trans_global_atomic_buffer(trans_ctx *tctx,
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UNREACHABLE("");
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}
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static pco_instr *trans_scratch(trans_ctx *tctx,
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pco_ref dest,
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pco_ref offset_src,
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pco_ref data_src)
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{
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const pco_common_data *common = &tctx->shader->data.common;
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assert(common->scratch_info.count > 0);
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unsigned base_addr_idx = common->scratch_info.start;
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unsigned block_size_idx = common->scratch_info.start + 2;
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pco_ref base_addr[2];
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pco_ref_hwreg_addr_comps(base_addr_idx, PCO_REG_CLASS_SHARED, base_addr);
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pco_ref block_size = pco_ref_hwreg(block_size_idx, PCO_REG_CLASS_SHARED);
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pco_ref local_addr_inst_num =
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pco_ref_hwreg(PCO_SR_LOCAL_ADDR_INST_NUM, PCO_REG_CLASS_SPEC);
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pco_ref inst_base_addr[2];
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pco_ref_new_ssa_addr_comps(tctx->func, inst_base_addr);
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pco_imadd64(&tctx->b,
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inst_base_addr[0],
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inst_base_addr[1],
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block_size,
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local_addr_inst_num,
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base_addr[0],
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base_addr[1],
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pco_ref_null());
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pco_ref addr_data_comps[3];
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pco_ref_new_ssa_addr_comps(tctx->func, addr_data_comps);
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pco_add64_32(&tctx->b,
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addr_data_comps[0],
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addr_data_comps[1],
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inst_base_addr[0],
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inst_base_addr[1],
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offset_src,
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pco_ref_null(),
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.s = true);
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bool is_load = pco_ref_is_null(data_src);
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if (is_load) {
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ASSERTED unsigned bits = pco_ref_get_bits(dest);
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/* TODO: 8/16-bit support via masking. */
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assert(bits == 32);
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pco_ref addr = pco_ref_new_ssa_addr(tctx->func);
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pco_vec(&tctx->b, addr, 2, addr_data_comps);
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unsigned chans = pco_ref_get_chans(dest);
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return pco_ld(&tctx->b,
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dest,
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pco_ref_drc(PCO_DRC_0),
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pco_ref_imm8(chans),
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addr);
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}
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unsigned chans = pco_ref_get_chans(data_src);
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pco_ref addr_data = pco_ref_new_ssa_addr_data(tctx->func, chans);
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addr_data_comps[2] = data_src;
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pco_vec(&tctx->b, addr_data, ARRAY_SIZE(addr_data_comps), addr_data_comps);
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pco_ref data_comp = pco_ref_new_ssa(tctx->func,
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pco_ref_get_bits(data_src),
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pco_ref_get_chans(data_src));
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pco_comp(&tctx->b, data_comp, addr_data, pco_ref_val16(2));
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return pco_st32(&tctx->b,
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data_comp,
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pco_ref_drc(PCO_DRC_0),
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pco_ref_imm8(chans),
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addr_data,
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pco_ref_null());
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}
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static inline enum pco_reg_class sys_val_to_reg_class(gl_system_value sys_val,
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mesa_shader_stage stage)
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{
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@ -1627,6 +1706,14 @@ static pco_instr *trans_intr(trans_ctx *tctx, nir_intrinsic_instr *intr)
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instr = trans_global_atomic_buffer(tctx, intr, dest, src[0]);
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break;
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case nir_intrinsic_load_scratch:
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instr = trans_scratch(tctx, dest, src[0], src[1]);
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break;
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case nir_intrinsic_store_scratch:
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instr = trans_scratch(tctx, dest, src[1], src[0]);
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break;
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/* Vertex sysvals. */
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case nir_intrinsic_load_vertex_id:
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case nir_intrinsic_load_instance_id:
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@ -907,6 +907,7 @@ struct pvr_pds_descriptor_set {
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#define PVR_BUFFER_TYPE_FS_META (10)
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#define PVR_BUFFER_TYPE_TILE_BUFFERS (11)
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#define PVR_BUFFER_TYPE_SPILL_INFO (12)
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#define PVR_BUFFER_TYPE_SCRATCH_INFO (13)
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#define PVR_BUFFER_TYPE_INVALID (~0)
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struct pvr_pds_buffer {
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@ -1582,7 +1582,8 @@ void pvr_pds_generate_descriptor_upload_program(
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case PVR_BUFFER_TYPE_FRONT_FACE_OP:
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case PVR_BUFFER_TYPE_FS_META:
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case PVR_BUFFER_TYPE_TILE_BUFFERS:
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case PVR_BUFFER_TYPE_SPILL_INFO: {
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case PVR_BUFFER_TYPE_SPILL_INFO:
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case PVR_BUFFER_TYPE_SCRATCH_INFO: {
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struct pvr_const_map_entry_special_buffer *special_buffer_entry;
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special_buffer_entry =
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@ -4020,6 +4020,43 @@ static VkResult pvr_setup_descriptor_mappings(
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break;
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}
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case PVR_BUFFER_TYPE_SCRATCH_INFO: {
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assert(data->common.scratch);
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unsigned scratch_block_size = data->common.scratch;
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/* TODO: 2048 is to account for each instance... do this
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* programmatically!
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*/
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struct pvr_suballoc_bo *scratch_buffer_bo;
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result = pvr_cmd_buffer_upload_general(cmd_buffer,
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NULL,
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scratch_block_size * 2048,
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&scratch_buffer_bo);
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if (result != VK_SUCCESS)
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return result;
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uint32_t scratch_info[3] = {
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[0] = scratch_buffer_bo->dev_addr.addr & 0xffffffff,
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[1] = scratch_buffer_bo->dev_addr.addr >> 32,
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[2] = scratch_block_size,
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};
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struct pvr_suballoc_bo *scratch_info_bo;
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result = pvr_cmd_buffer_upload_general(cmd_buffer,
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scratch_info,
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sizeof(scratch_info),
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&scratch_info_bo);
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if (result != VK_SUCCESS)
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return result;
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PVR_WRITE(qword_buffer,
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scratch_info_bo->dev_addr.addr,
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special_buff_entry->const_offset,
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pds_info->data_size_in_dwords);
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break;
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}
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default:
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UNREACHABLE("Unsupported special buffer type.");
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}
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@ -623,6 +623,14 @@ static VkResult pvr_pds_descriptor_program_create_and_upload(
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};
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}
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if (data->common.scratch_info.count > 0) {
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program.buffers[program.buffer_count++] = (struct pvr_pds_buffer){
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.type = PVR_BUFFER_TYPE_SCRATCH_INFO,
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.size_in_dwords = data->common.scratch_info.count,
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.destination = data->common.scratch_info.start,
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};
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}
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if (stage == MESA_SHADER_FRAGMENT &&
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data->common.sys_vals[SYSTEM_VALUE_FRONT_FACE].count > 0) {
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program.buffers[program.buffer_count++] = (struct pvr_pds_buffer){
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@ -2424,6 +2432,15 @@ static void pvr_setup_descriptors(pco_data *data,
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data->common.shareds += 3;
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}
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if (data->common.scratch) {
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data->common.scratch_info = (pco_range){
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.start = data->common.shareds,
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.count = 3,
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};
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data->common.shareds += 3;
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}
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}
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static void
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