diff --git a/src/amd/vulkan/meta/radv_meta.c b/src/amd/vulkan/meta/radv_meta.c index 2a22c06f8b3..e7b590def72 100644 --- a/src/amd/vulkan/meta/radv_meta.c +++ b/src/amd/vulkan/meta/radv_meta.c @@ -562,7 +562,6 @@ radv_device_finish_meta(struct radv_device *device) radv_device_finish_meta_resolve_fragment_state(device); radv_device_finish_meta_fmask_expand_state(device); radv_device_finish_meta_dcc_retile_state(device); - radv_device_finish_meta_copy_vrs_htile_state(device); radv_device_finish_meta_fmask_copy_state(device); radv_store_meta_pipeline(device); diff --git a/src/amd/vulkan/meta/radv_meta.h b/src/amd/vulkan/meta/radv_meta.h index e805b1b964c..852f76e9d85 100644 --- a/src/amd/vulkan/meta/radv_meta.h +++ b/src/amd/vulkan/meta/radv_meta.h @@ -140,8 +140,6 @@ void radv_device_finish_meta_fmask_expand_state(struct radv_device *device); void radv_device_finish_meta_dcc_retile_state(struct radv_device *device); -void radv_device_finish_meta_copy_vrs_htile_state(struct radv_device *device); - VkResult radv_device_init_null_accel_struct(struct radv_device *device); VkResult radv_device_init_accel_struct_build_state(struct radv_device *device); void radv_device_finish_accel_struct_build_state(struct radv_device *device); diff --git a/src/amd/vulkan/meta/radv_meta_copy_vrs_htile.c b/src/amd/vulkan/meta/radv_meta_copy_vrs_htile.c index ff8ac435802..e5f36ccbff0 100644 --- a/src/amd/vulkan/meta/radv_meta_copy_vrs_htile.c +++ b/src/amd/vulkan/meta/radv_meta_copy_vrs_htile.c @@ -11,17 +11,6 @@ #include "vk_common_entrypoints.h" #include "vk_format.h" -void -radv_device_finish_meta_copy_vrs_htile_state(struct radv_device *device) -{ - struct radv_meta_state *state = &device->meta_state; - - radv_DestroyPipeline(radv_device_to_handle(device), state->copy_vrs_htile_pipeline, &state->alloc); - radv_DestroyPipelineLayout(radv_device_to_handle(device), state->copy_vrs_htile_p_layout, &state->alloc); - device->vk.dispatch_table.DestroyDescriptorSetLayout(radv_device_to_handle(device), state->copy_vrs_htile_ds_layout, - &state->alloc); -} - static nir_shader * build_copy_vrs_htile_shader(struct radv_device *device, struct radeon_surf *surf) { @@ -104,9 +93,10 @@ build_copy_vrs_htile_shader(struct radv_device *device, struct radeon_surf *surf } static VkResult -create_pipeline(struct radv_device *device, struct radeon_surf *surf) +get_pipeline(struct radv_device *device, struct radv_image *image, VkPipeline *pipeline_out, + VkPipelineLayout *layout_out) { - struct radv_meta_state *state = &device->meta_state; + const char *key_data = "radv-copy-vrs-htile"; VkResult result; const VkDescriptorSetLayoutBinding bindings[] = { @@ -124,46 +114,50 @@ create_pipeline(struct radv_device *device, struct radeon_surf *surf) }, }; - result = radv_meta_create_descriptor_set_layout(device, 2, bindings, &state->copy_vrs_htile_ds_layout); - if (result != VK_SUCCESS) - return result; + const VkDescriptorSetLayoutCreateInfo desc_info = { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, + .flags = VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT, + .bindingCount = 2, + .pBindings = bindings, + }; const VkPushConstantRange pc_range = { .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, .size = 20, }; - result = radv_meta_create_pipeline_layout(device, &state->copy_vrs_htile_ds_layout, 1, &pc_range, - &state->copy_vrs_htile_p_layout); + result = vk_meta_get_pipeline_layout(&device->vk, &device->meta_state.device, &desc_info, &pc_range, key_data, + strlen(key_data), layout_out); if (result != VK_SUCCESS) return result; - nir_shader *cs = build_copy_vrs_htile_shader(device, surf); - - result = - radv_meta_create_compute_pipeline(device, cs, state->copy_vrs_htile_p_layout, &state->copy_vrs_htile_pipeline); - - ralloc_free(cs); - return result; -} - -static VkResult -get_pipeline(struct radv_device *device, struct radv_image *image, VkPipeline *pipeline_out) -{ - struct radv_meta_state *state = &device->meta_state; - VkResult result = VK_SUCCESS; - - mtx_lock(&state->mtx); - if (!state->copy_vrs_htile_pipeline) { - result = create_pipeline(device, &image->planes[0].surface); - if (result != VK_SUCCESS) - goto fail; + VkPipeline pipeline_from_cache = vk_meta_lookup_pipeline(&device->meta_state.device, key_data, strlen(key_data)); + if (pipeline_from_cache != VK_NULL_HANDLE) { + *pipeline_out = pipeline_from_cache; + return VK_SUCCESS; } - *pipeline_out = state->copy_vrs_htile_pipeline; + nir_shader *cs = build_copy_vrs_htile_shader(device, &image->planes[0].surface); -fail: - mtx_unlock(&state->mtx); + const VkPipelineShaderStageCreateInfo stage_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_COMPUTE_BIT, + .module = vk_shader_module_handle_from_nir(cs), + .pName = "main", + .pSpecializationInfo = NULL, + }; + + const VkComputePipelineCreateInfo pipeline_info = { + .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO, + .stage = stage_info, + .flags = 0, + .layout = *layout_out, + }; + + result = vk_meta_create_compute_pipeline(&device->vk, &device->meta_state.device, &pipeline_info, key_data, + strlen(key_data), pipeline_out); + + ralloc_free(cs); return result; } @@ -172,14 +166,14 @@ radv_copy_vrs_htile(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view * struct radv_image *dst_image, struct radv_buffer *htile_buffer, bool read_htile_value) { struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); - struct radv_meta_state *state = &device->meta_state; struct radv_meta_saved_state saved_state; + VkPipelineLayout layout; VkPipeline pipeline; VkResult result; assert(radv_image_has_htile(dst_image)); - result = get_pipeline(device, dst_image, &pipeline); + result = get_pipeline(device, dst_image, &pipeline, &layout); if (result != VK_SUCCESS) { vk_command_buffer_set_error(&cmd_buffer->vk, result); return; @@ -196,7 +190,7 @@ radv_copy_vrs_htile(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view * radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); radv_meta_push_descriptor_set( - cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, state->copy_vrs_htile_p_layout, 0, 2, + cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, .dstBinding = 0, .dstArrayElement = 0, @@ -227,8 +221,8 @@ radv_copy_vrs_htile(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view * read_htile_value, }; - vk_common_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), state->copy_vrs_htile_p_layout, - VK_SHADER_STAGE_COMPUTE_BIT, 0, 20, constants); + vk_common_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), layout, VK_SHADER_STAGE_COMPUTE_BIT, 0, 20, + constants); uint32_t width = DIV_ROUND_UP(rect->extent.width, 8); uint32_t height = DIV_ROUND_UP(rect->extent.height, 8); diff --git a/src/amd/vulkan/radv_device.h b/src/amd/vulkan/radv_device.h index daf0bb90c74..593f04e1476 100644 --- a/src/amd/vulkan/radv_device.h +++ b/src/amd/vulkan/radv_device.h @@ -115,11 +115,6 @@ struct radv_meta_state { VkPipelineLayout clear_htile_mask_p_layout; VkDescriptorSetLayout clear_htile_mask_ds_layout; - /* Copy VRS into HTILE. */ - VkPipeline copy_vrs_htile_pipeline; - VkPipelineLayout copy_vrs_htile_p_layout; - VkDescriptorSetLayout copy_vrs_htile_ds_layout; - /* Clear DCC with comp-to-single. */ VkPipeline clear_dcc_comp_to_single_pipeline[2]; /* 0: 1x, 1: 2x/4x/8x */ VkPipelineLayout clear_dcc_comp_to_single_p_layout;