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radeonsi: implement task ring nir intrinsic lower
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
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1 changed files with 38 additions and 0 deletions
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@ -185,6 +185,38 @@ static bool build_gsvs_ring_desc(nir_builder *b, struct lower_abi_state *s)
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return false;
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}
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static nir_def *build_task_ring_desc(nir_builder *b, struct lower_abi_state *s,
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bool payload)
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{
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struct si_screen *screen = s->shader->selector->screen;
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struct ac_task_info *info = &screen->task_info;
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unsigned entry_size = payload ? info->payload_entry_size : AC_TASK_DRAW_ENTRY_BYTES;
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const struct ac_buffer_state ac_state = {
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.va = (uint64_t)screen->info.address32_hi << 32,
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.size = screen->task_info.num_entries * entry_size,
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.format = PIPE_FORMAT_R32_FLOAT,
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.swizzle = { PIPE_SWIZZLE_X, PIPE_SWIZZLE_Y, PIPE_SWIZZLE_Z, PIPE_SWIZZLE_W },
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.gfx10_oob_select = V_008F0C_OOB_SELECT_DISABLED,
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};
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unsigned desc[4];
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ac_build_buffer_descriptor(screen->info.gfx_level, &ac_state, desc);
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nir_def *addr = ac_nir_load_arg(b, &s->args->ac, s->args->task_ring_addr);
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unsigned offset = payload ? info->payload_ring_offset : info->draw_ring_offset;
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addr = nir_iadd_imm(b, addr, offset);
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nir_def *comp[] = {
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addr,
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nir_imm_int(b, desc[1]),
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nir_imm_int(b, desc[2]),
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nir_imm_int(b, desc[3]),
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};
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return nir_vec(b, comp, 4);
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}
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static bool preload_reusable_variables(nir_builder *b, struct lower_abi_state *s)
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{
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const struct si_shader_selector *sel = s->shader->selector;
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@ -629,6 +661,12 @@ static bool lower_intrinsic(nir_builder *b, nir_instr *instr, struct lower_abi_s
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case nir_intrinsic_load_lds_ngg_gs_out_vertex_base_amd:
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replacement = nir_imul_imm(b, GET_FIELD_NIR(GS_STATE_GS_OUT_LDS_OFFSET_256B), 256);
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break;
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case nir_intrinsic_load_ring_task_draw_amd:
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replacement = build_task_ring_desc(b, s, false);
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break;
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case nir_intrinsic_load_ring_task_payload_amd:
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replacement = build_task_ring_desc(b, s, true);
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break;
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default:
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return false;
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}
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