From f0fcb778b4c08b8c99dac92bde879f5a090db281 Mon Sep 17 00:00:00 2001 From: Caio Oliveira Date: Wed, 7 Sep 2022 00:21:20 -0700 Subject: [PATCH] intel/compiler/xe2: Fix URB writes in TCS Reviewed-by: Kenneth Graunke Part-of: --- src/intel/compiler/brw_fs_nir.cpp | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index b3428d2f97b..fe4535c75ed 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -2928,29 +2928,34 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder &bld, break; unsigned num_components = util_last_bit(mask); - - /* We can only pack two 64-bit components in a single message, so send - * 2 messages if we have more components - */ unsigned first_component = nir_intrinsic_component(instr); + assert((first_component + num_components) <= 4); + mask = mask << first_component; + const bool has_urb_lsc = devinfo->ver >= 20; + fs_reg mask_reg; if (mask != WRITEMASK_XYZW) mask_reg = brw_imm_ud(mask << 16); fs_reg sources[4]; + unsigned m = has_urb_lsc ? 0 : first_component; for (unsigned i = 0; i < num_components; i++) { - if (!(mask & (1 << (i + first_component)))) - continue; - - sources[i + first_component] = offset(value, bld, i); + int c = i + first_component; + if (mask & (1 << c)) { + sources[m++] = offset(value, bld, i); + } else if (devinfo->ver < 20) { + m++; + } } + assert(has_urb_lsc || m == (first_component + num_components)); + unsigned header_size = 1 + unsigned(indirect_offset.file != BAD_FILE) + unsigned(mask != WRITEMASK_XYZW); - const unsigned length = num_components + first_component; + const unsigned length = m; fs_reg srcs[URB_LOGICAL_NUM_SRCS]; srcs[URB_LOGICAL_SRC_HANDLE] = tcs_payload().patch_urb_output;