r300: fix BE depth/stencil raw transfer endian state

Tiled depth/stencil transfers can raw-copy 32-bit ZS storage through an
RGBA8 color alias. On big endian, the normal RGBA8 array policy programs
no swap, while the underlying ZS storage uses the dword endian
convention. Keep those raw aliases on dword swap so depth readback sees
the same byte order that the ZS path wrote.

Fixes spec@arb_depth_texture@depthstencil-render-miplevels 146 d=z24.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42218>
This commit is contained in:
Pavel Ondračka 2026-06-12 15:18:59 +02:00 committed by Marge Bot
parent b3cd46cca6
commit f01efcb12e

View file

@ -58,6 +58,22 @@ static unsigned r300_get_endian_swap(enum pipe_format format,
unsigned swap_size;
#if UTIL_ARCH_BIG_ENDIAN
if (util_format_is_depth_or_stencil(tex->b.format)) {
switch (format) {
case PIPE_FORMAT_B8G8R8A8_UNORM:
case PIPE_FORMAT_B8G8R8X8_UNORM:
case PIPE_FORMAT_R8G8B8A8_UNORM:
case PIPE_FORMAT_R8G8B8X8_UNORM:
/* Depth/stencil transfer blits can alias 32-bit ZS storage as
* RGBA8. Keep the alias on the ZS dword endian convention instead
* of the 8-bit array convention.
*/
return R300_SURF_DWORD_SWAP;
default:
break;
}
}
if ((tex->b.bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW)) ==
(PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW) &&
!(tex->b.flags & R300_RESOURCE_FLAG_TRANSFER) &&