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util/ra: Make allocating conflict lists optional

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Since i965 is now using make_reg_conflicts_transitive and doesn't need
q-value computations, they are disabled on i965.  They are enabled
everywhere else so that they get the old behavior.  This reduces the time
spent in eglInitialize() on BDW by around 10-15%.

Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Jason Ekstrand 2015-08-15 09:58:32 -07:00
parent c3b21f2d56
commit f01bdb0484
7 changed files with 25 additions and 15 deletions
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2
src/gallium/drivers/freedreno/ir3/ir3_ra.c
View file

@ -189,7 +189,7 @@ ir3_ra_alloc_reg_set(void *memctx)
}
/* allocate the reg-set.. */
set->regs = ra_alloc_reg_set(set, ra_reg_count);
set->regs = ra_alloc_reg_set(set, ra_reg_count, true);
set->ra_reg_to_gpr = ralloc_array(set, uint16_t, ra_reg_count);
set->gpr_to_ra_reg = ralloc_array(set, uint16_t *, total_class_count);

3
src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c
View file

@ -693,7 +693,8 @@ void rc_init_regalloc_state(struct rc_regalloc_state *s)
};
/* Allocate the main ra data structure */
s->regs = ra_alloc_reg_set(NULL, R500_PFS_NUM_TEMP_REGS * RC_MASK_XYZW);
s->regs = ra_alloc_reg_set(NULL, R500_PFS_NUM_TEMP_REGS * RC_MASK_XYZW,
true);
/* Create the register classes */
for (i = 0; i < RC_REG_CLASS_COUNT; i++) {

2
src/gallium/drivers/vc4/vc4_register_allocate.c
View file

@ -113,7 +113,7 @@ vc4_alloc_reg_set(struct vc4_context *vc4)
if (vc4->regs)
return;
vc4->regs = ra_alloc_reg_set(vc4, ARRAY_SIZE(vc4_regs));
vc4->regs = ra_alloc_reg_set(vc4, ARRAY_SIZE(vc4_regs), true);
vc4->reg_class_any = ra_alloc_reg_class(vc4->regs);
vc4->reg_class_r4_or_a = ra_alloc_reg_class(vc4->regs);

2
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
View file

@ -156,7 +156,7 @@ brw_alloc_reg_set(struct brw_compiler *compiler, int dispatch_width)
}
uint8_t *ra_reg_to_grf = ralloc_array(compiler, uint8_t, ra_reg_count);
struct ra_regs *regs = ra_alloc_reg_set(compiler, ra_reg_count);
struct ra_regs *regs = ra_alloc_reg_set(compiler, ra_reg_count, false);
if (devinfo->gen >= 6)
ra_set_allocate_round_robin(regs);
int *classes = ralloc_array(compiler, int, class_count);

2
src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
View file

@ -115,7 +115,7 @@ brw_vec4_alloc_reg_set(struct brw_compiler *compiler)
ralloc_free(compiler->vec4_reg_set.ra_reg_to_grf);
compiler->vec4_reg_set.ra_reg_to_grf = ralloc_array(compiler, uint8_t, ra_reg_count);
ralloc_free(compiler->vec4_reg_set.regs);
compiler->vec4_reg_set.regs = ra_alloc_reg_set(compiler, ra_reg_count);
compiler->vec4_reg_set.regs = ra_alloc_reg_set(compiler, ra_reg_count, false);
if (compiler->devinfo->gen >= 6)
ra_set_allocate_round_robin(compiler->vec4_reg_set.regs);
ralloc_free(compiler->vec4_reg_set.classes);

26
src/util/register_allocate.c
View file

@ -183,7 +183,7 @@ struct ra_graph {
* using ralloc_free().
*/
struct ra_regs *
ra_alloc_reg_set(void *mem_ctx, unsigned int count)
ra_alloc_reg_set(void *mem_ctx, unsigned int count, bool need_conflict_lists)
{
unsigned int i;
struct ra_regs *regs;
@ -197,9 +197,15 @@ ra_alloc_reg_set(void *mem_ctx, unsigned int count)
BITSET_WORDS(count));
BITSET_SET(regs->regs[i].conflicts, i);
regs->regs[i].conflict_list = ralloc_array(regs->regs, unsigned int, 4);
regs->regs[i].conflict_list_size = 4;
regs->regs[i].conflict_list[0] = i;
if (need_conflict_lists) {
regs->regs[i].conflict_list = ralloc_array(regs->regs,
unsigned int, 4);
regs->regs[i].conflict_list_size = 4;
regs->regs[i].conflict_list[0] = i;
} else {
regs->regs[i].conflict_list = NULL;
regs->regs[i].conflict_list_size = 0;
}
regs->regs[i].num_conflicts = 1;
}
@ -227,12 +233,14 @@ ra_add_conflict_list(struct ra_regs *regs, unsigned int r1, unsigned int r2)
{
struct ra_reg *reg1 = &regs->regs[r1];
if (reg1->conflict_list_size == reg1->num_conflicts) {
reg1->conflict_list_size *= 2;
reg1->conflict_list = reralloc(regs->regs, reg1->conflict_list,
unsigned int, reg1->conflict_list_size);
if (reg1->conflict_list) {
if (reg1->conflict_list_size == reg1->num_conflicts) {
reg1->conflict_list_size *= 2;
reg1->conflict_list = reralloc(regs->regs, reg1->conflict_list,
unsigned int, reg1->conflict_list_size);
}
reg1->conflict_list[reg1->num_conflicts++] = r2;
}
reg1->conflict_list[reg1->num_conflicts++] = r2;
BITSET_SET(reg1->conflicts, r2);
}

3
src/util/register_allocate.h
View file

@ -44,7 +44,8 @@ struct ra_regs;
* registers, such as aligned register pairs that conflict with the
* two real registers from which they are composed.
*/
struct ra_regs *ra_alloc_reg_set(void *mem_ctx, unsigned int count);
struct ra_regs *ra_alloc_reg_set(void *mem_ctx, unsigned int count,
bool need_conflict_lists);
void ra_set_allocate_round_robin(struct ra_regs *regs);
unsigned int ra_alloc_reg_class(struct ra_regs *regs);
void ra_add_reg_conflict(struct ra_regs *regs,