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r600g: compute CS space for streamout correctly, add comments

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SET_CONTEXT_REG was not counted in.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Marek Olšák 2012-06-14 22:25:50 +02:00
parent bb07e25131
commit f01594be0e
1 changed files with 7 additions and 6 deletions
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13
src/gallium/drivers/r600/r600_hw_context.c
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@ -1324,15 +1324,16 @@ void r600_context_streamout_begin(struct r600_context *ctx)
ctx->num_cs_dw_streamout_end =
12 + /* flush_vgt_streamout */
util_bitcount(buffer_en) * 8 +
3;
util_bitcount(buffer_en) * 8 + /* STRMOUT_BUFFER_UPDATE */
3 /* set_streamout_enable(0) */;
r600_need_cs_space(ctx,
12 + /* flush_vgt_streamout */
6 + /* enables */
util_bitcount(buffer_en & ctx->streamout_append_bitmask) * 8 +
util_bitcount(buffer_en & ~ctx->streamout_append_bitmask) * 6 +
(ctx->family > CHIP_R600 && ctx->family < CHIP_RV770 ? 2 : 0) +
6 + /* set_streamout_enable */
util_bitcount(buffer_en) * 7 + /* SET_CONTEXT_REG */
util_bitcount(buffer_en & ctx->streamout_append_bitmask) * 8 + /* STRMOUT_BUFFER_UPDATE */
util_bitcount(buffer_en & ~ctx->streamout_append_bitmask) * 6 + /* STRMOUT_BUFFER_UPDATE */
(ctx->family > CHIP_R600 && ctx->family < CHIP_RV770 ? 2 : 0) + /* SURFACE_BASE_UPDATE */
ctx->num_cs_dw_streamout_end, TRUE);
if (ctx->chip_class >= EVERGREEN) {