zink: fix xfb counter buffer barriers

a read barrier is needed for resume, yes, but the counter buffer
is always being written to, so write access must always be set

cc: mesa-stable

fixes (nv):
KHR-GL46.transform_feedback.draw_xfb_test

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16065>
(cherry picked from commit fc5edf9b68)

Conflicts:
	src/gallium/drivers/zink/ci/zink-nv-fails.txt
This commit is contained in:
Mike Blumenkrantz 2022-04-20 11:46:36 -04:00 committed by Dylan Baker
parent 68b25a57c1
commit f00600e1a3
3 changed files with 16 additions and 16 deletions

View file

@ -13,7 +13,7 @@
"description": "zink: fix xfb counter buffer barriers",
"nominated": true,
"nomination_type": 0,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": null
},

View file

@ -149,7 +149,6 @@ KHR-GL46.texture_view.view_sampling,Fail
KHR-GL46.transform_feedback.capture_geometry_interleaved_test,Fail
KHR-GL46.transform_feedback.capture_geometry_separate_test,Fail
KHR-GL46.transform_feedback.capture_vertex_separate_test,Fail
KHR-GL46.transform_feedback.draw_xfb_test,Fail
KHR-GL46.transform_feedback.query_geometry_interleaved_test,Fail
KHR-GL46.transform_feedback.query_geometry_separate_test,Fail
KHR-GL46.transform_feedback.query_vertex_interleaved_test,Fail

View file

@ -20,25 +20,26 @@
static void
zink_emit_xfb_counter_barrier(struct zink_context *ctx)
{
/* Between the pause and resume there needs to be a memory barrier for the counter buffers
* with a source access of VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT
* at pipeline stage VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT
* to a destination access of VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT
* at pipeline stage VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT.
*
* - from VK_EXT_transform_feedback spec
*/
for (unsigned i = 0; i < ctx->num_so_targets; i++) {
struct zink_so_target *t = zink_so_target(ctx->so_targets[i]);
if (!t)
continue;
struct zink_resource *res = zink_resource(t->counter_buffer);
if (t->counter_buffer_valid)
zink_resource_buffer_barrier(ctx, res, VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT,
VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT);
else
zink_resource_buffer_barrier(ctx, res, VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT,
VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT);
VkAccessFlags access = VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT;
VkPipelineStageFlags stage = VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT;
if (t->counter_buffer_valid) {
/* Between the pause and resume there needs to be a memory barrier for the counter buffers
* with a source access of VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT
* at pipeline stage VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT
* to a destination access of VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT
* at pipeline stage VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT.
*
* - from VK_EXT_transform_feedback spec
*/
access |= VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT;
stage |= VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT;
}
zink_resource_buffer_barrier(ctx, res, access, stage);
}
ctx->xfb_barrier = false;
}