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anv: force whole EU array to be powered for perf queries

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Because of functional requirements for Gen11, when perf is enabled we
only power half the EU array.

This change forces it to enable everything.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021>
This commit is contained in:
Lionel Landwerlin 2020-03-02 14:44:55 +02:00 • committed by Marge Bot
parent a7998371ed
commit efdb7fa9a8
1 changed files with 10 additions and 0 deletions
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10
src/intel/vulkan/anv_perf.c
View file

@ -83,6 +83,16 @@ anv_device_perf_open(struct anv_device *device, uint64_t metric_id)
properties[p++] = DRM_I915_PERF_PROP_HOLD_PREEMPTION;
properties[p++] = true;
/* If global SSEU is available, pin it to the default. This will ensure on
* Gen11 for instance we use the full EU array. Initially when perf was
* enabled we would use only half on Gen11 because of functional
* requirements.
*/
if (device->physical->perf->i915_perf_version >= 4) {
properties[p++] = DRM_I915_PERF_PROP_GLOBAL_SSEU;
properties[p++] = (uintptr_t) &device->physical->perf->sseu;
}
memset(&param, 0, sizeof(param));
param.flags = 0;
param.flags |= I915_PERF_FLAG_FD_CLOEXEC | I915_PERF_FLAG_FD_NONBLOCK;