From efcbccaf0ee76ec8e0f23a3de651c56cd0b621a4 Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Fri, 24 Jun 2022 11:53:18 +0100 Subject: [PATCH] aco/ra: handle empty def_reg interval in get_regs_for_copies MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If def_reg is empty, then def_reg.lo() may be lower than bounds.lo() if we're moving VGPRs and info.bounds will be invalid. Signed-off-by: Rhys Perry Reviewed-by: Daniel Schürmann Part-of: --- src/amd/compiler/aco_register_allocation.cpp | 7 ++++++- src/amd/compiler/tests/test_regalloc.cpp | 12 ++++++++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp index 9058b14b057..dd48d650320 100644 --- a/src/amd/compiler/aco_register_allocation.cpp +++ b/src/amd/compiler/aco_register_allocation.cpp @@ -749,6 +749,7 @@ adjust_max_used_regs(ra_ctx& ctx, RegClass rc, unsigned reg) if (rc.type() == RegType::vgpr) { assert(reg >= 256); uint16_t hi = reg - 256 + size - 1; + assert(hi <= 255); ctx.max_used_vgpr = std::max(ctx.max_used_vgpr, hi); } else if (reg + rc.size() <= max_addressible_sgpr) { uint16_t hi = reg + size - 1; @@ -1117,7 +1118,11 @@ get_regs_for_copies(ra_ctx& ctx, RegisterFile& reg_file, } } } - if (!res.second) { + if (!res.second && !def_reg.size) { + /* If this is before definitions are handled, def_reg may be an empty interval. */ + info.bounds = bounds; + res = get_reg_simple(ctx, reg_file, info); + } else if (!res.second) { /* Try to find space within the bounds but outside of the definition */ info.bounds = PhysRegInterval::from_until(bounds.lo(), MIN2(def_reg.lo(), bounds.hi())); res = get_reg_simple(ctx, reg_file, info); diff --git a/src/amd/compiler/tests/test_regalloc.cpp b/src/amd/compiler/tests/test_regalloc.cpp index 702dfe29541..da4f1e205ce 100644 --- a/src/amd/compiler/tests/test_regalloc.cpp +++ b/src/amd/compiler/tests/test_regalloc.cpp @@ -149,6 +149,18 @@ BEGIN_TEST(regalloc.precolor.vector.collect) finish_ra_test(ra_test_policy()); END_TEST +BEGIN_TEST(regalloc.precolor.vgpr_move) + //>> v1: %tmp0:v[0], v1: %tmp1:v[1] = p_startpgm + if (!setup_cs("v1 v1", GFX10)) + return; + + //! v1: %tmp0_2:v[1], v1: %tmp1_2:v[0] = p_parallelcopy %tmp0:v[0], %tmp1:v[1] + //! p_unit_test %tmp0_2:v[1], %tmp1_2:v[0] + bld.pseudo(aco_opcode::p_unit_test, inputs[0], Operand(inputs[1], PhysReg(256))); + + finish_ra_test(ra_test_policy()); +END_TEST + BEGIN_TEST(regalloc.scratch_sgpr.create_vector) if (!setup_cs("v1 s1", GFX7)) return;