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radeonsi/gfx9: add IB parser support
Both GFX6 and GFX9 fields are printed next to each other in parsed IBs. The Python script parses both headers like one stream and tries to merge all definitions. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
parent
9338ab0afd
commit
ef97cc0cae
4 changed files with 37 additions and 19 deletions
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@ -65,8 +65,8 @@ common_libamd_common_la_SOURCES += $(AMD_NIR_FILES)
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endif
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endif
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endif
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endif
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common/sid_tables.h: $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h
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common/sid_tables.h: $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h $(srcdir)/common/gfx9d.h
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$(AM_V_at)$(MKDIR_P) $(@D)
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$(AM_V_at)$(MKDIR_P) $(@D)
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$(AM_V_GEN) $(PYTHON2) $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h > $@
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$(AM_V_GEN) $(PYTHON2) $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h $(srcdir)/common/gfx9d.h > $@
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BUILT_SOURCES = $(AMD_GENERATED_FILES)
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BUILT_SOURCES = $(AMD_GENERATED_FILES)
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@ -27,6 +27,7 @@
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#include "ac_debug.h"
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#include "ac_debug.h"
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#include "sid.h"
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#include "sid.h"
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#include "gfx9d.h"
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#include "sid_tables.h"
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#include "sid_tables.h"
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#include "util/u_math.h"
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#include "util/u_math.h"
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#include "util/u_memory.h"
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#include "util/u_memory.h"
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@ -145,11 +145,8 @@ def strip_prefix(s):
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'''Strip prefix in the form ._.*_, e.g. R_001234_'''
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'''Strip prefix in the form ._.*_, e.g. R_001234_'''
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return s[s[2:].find('_')+3:]
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return s[s[2:].find('_')+3:]
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def parse(filename, regs, packets):
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def parse(filename):
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stream = open(filename)
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stream = open(filename)
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regs = []
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packets = []
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for line in stream:
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for line in stream:
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if not line.startswith('#define '):
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if not line.startswith('#define '):
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@ -158,16 +155,38 @@ def parse(filename):
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line = line[8:].strip()
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line = line[8:].strip()
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if line.startswith('R_'):
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if line.startswith('R_'):
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reg = Reg(line.split()[0])
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name = line.split()[0]
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regs.append(reg)
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for it in regs:
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if it.r_name == name:
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reg = it
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break
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else:
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reg = Reg(name)
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regs.append(reg)
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elif line.startswith('S_'):
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elif line.startswith('S_'):
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field = Field(reg, line[:line.find('(')])
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name = line[:line.find('(')]
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reg.fields.append(field)
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for it in reg.fields:
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if it.s_name == name:
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field = it
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break
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else:
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field = Field(reg, name)
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reg.fields.append(field)
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elif line.startswith('V_'):
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elif line.startswith('V_'):
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split = line.split()
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split = line.split()
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field.values.append((split[0], int(split[1], 0)))
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name = split[0]
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value = int(split[1], 0)
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for (n,v) in field.values:
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if n == name:
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if v != value:
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sys.exit('Value mismatch: name = ' + name)
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field.values.append((name, value))
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elif line.startswith('PKT3_') and line.find('0x') != -1 and line.find('(') == -1:
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elif line.startswith('PKT3_') and line.find('0x') != -1 and line.find('(') == -1:
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packets.append(line.split()[0])
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packets.append(line.split()[0])
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@ -192,12 +211,8 @@ def parse(filename):
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reg.fields_owner = reg0
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reg.fields_owner = reg0
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reg.own_fields = False
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reg.own_fields = False
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return (regs, packets)
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def write_tables(regs, packets):
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def write_tables(tables):
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regs = tables[0]
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packets = tables[1]
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strings = StringTable()
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strings = StringTable()
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strings_offsets = IntTable("int")
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strings_offsets = IntTable("int")
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@ -282,10 +297,11 @@ struct si_packet3 {
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def main():
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def main():
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tables = []
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regs = []
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packets = []
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for arg in sys.argv[1:]:
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for arg in sys.argv[1:]:
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tables.extend(parse(arg))
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parse(arg, regs, packets)
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write_tables(tables)
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write_tables(regs, packets)
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if __name__ == '__main__':
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if __name__ == '__main__':
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@ -26,6 +26,7 @@
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#include "si_pipe.h"
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#include "si_pipe.h"
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#include "sid.h"
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#include "sid.h"
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#include "gfx9d.h"
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#include "sid_tables.h"
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#include "sid_tables.h"
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#include "ddebug/dd_util.h"
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#include "ddebug/dd_util.h"
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#include "util/u_memory.h"
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#include "util/u_memory.h"
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