mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-09 04:38:03 +02:00
radv: implement image->image copies using compute shader
This is required for having a separate compute queue, we probably can't use this on GFX queue due to DCC. v2: Set coord_components = 2 for itoi texture fetch. (Bas) Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Dave Airlie
Bas Nieuwenhuizen
parent
983af3a6d1
commit
ef5f59c9a9
4 changed files with 343 additions and 6 deletions
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@ -159,7 +159,10 @@ void radv_meta_begin_bufimage(struct radv_cmd_buffer *cmd_buffer,
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struct radv_meta_saved_compute_state *save);
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void radv_meta_end_bufimage(struct radv_cmd_buffer *cmd_buffer,
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struct radv_meta_saved_compute_state *save);
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void radv_meta_begin_itoi(struct radv_cmd_buffer *cmd_buffer,
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struct radv_meta_saved_compute_state *save);
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void radv_meta_end_itoi(struct radv_cmd_buffer *cmd_buffer,
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struct radv_meta_saved_compute_state *save);
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void radv_meta_image_to_buffer(struct radv_cmd_buffer *cmd_buffer,
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struct radv_meta_blit2d_surf *src,
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struct radv_meta_blit2d_buffer *dst,
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@ -171,6 +174,11 @@ void radv_meta_buffer_to_image_cs(struct radv_cmd_buffer *cmd_buffer,
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struct radv_meta_blit2d_surf *dst,
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unsigned num_rects,
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struct radv_meta_blit2d_rect *rects);
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void radv_meta_image_to_image_cs(struct radv_cmd_buffer *cmd_buffer,
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struct radv_meta_blit2d_surf *src,
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struct radv_meta_blit2d_surf *dst,
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unsigned num_rects,
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struct radv_meta_blit2d_rect *rects);
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void radv_decompress_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
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struct radv_image *image,
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@ -420,11 +420,201 @@ radv_device_finish_meta_btoi_state(struct radv_device *device)
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}
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}
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static nir_shader *
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build_nir_itoi_compute_shader(struct radv_device *dev)
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{
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nir_builder b;
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const struct glsl_type *buf_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
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false,
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false,
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GLSL_TYPE_FLOAT);
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const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
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false,
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false,
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GLSL_TYPE_FLOAT);
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nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL);
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b.shader->info->name = ralloc_strdup(b.shader, "meta_itoi_cs");
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b.shader->info->cs.local_size[0] = 16;
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b.shader->info->cs.local_size[1] = 16;
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b.shader->info->cs.local_size[2] = 1;
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nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform,
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buf_type, "s_tex");
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input_img->data.descriptor_set = 0;
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input_img->data.binding = 0;
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nir_variable *output_img = nir_variable_create(b.shader, nir_var_uniform,
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img_type, "out_img");
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output_img->data.descriptor_set = 0;
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output_img->data.binding = 1;
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nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0);
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nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0);
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nir_ssa_def *block_size = nir_imm_ivec4(&b,
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b.shader->info->cs.local_size[0],
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b.shader->info->cs.local_size[1],
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b.shader->info->cs.local_size[2], 0);
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nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id);
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nir_intrinsic_instr *src_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant);
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src_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0));
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src_offset->num_components = 2;
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nir_ssa_dest_init(&src_offset->instr, &src_offset->dest, 2, 32, "src_offset");
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nir_builder_instr_insert(&b, &src_offset->instr);
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nir_intrinsic_instr *dst_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant);
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dst_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8));
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dst_offset->num_components = 2;
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nir_ssa_dest_init(&dst_offset->instr, &dst_offset->dest, 2, 32, "dst_offset");
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nir_builder_instr_insert(&b, &dst_offset->instr);
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nir_ssa_def *src_coord = nir_iadd(&b, global_id, &src_offset->dest.ssa);
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nir_ssa_def *dst_coord = nir_iadd(&b, global_id, &dst_offset->dest.ssa);
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nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2);
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tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
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tex->op = nir_texop_txf;
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tex->src[0].src_type = nir_tex_src_coord;
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tex->src[0].src = nir_src_for_ssa(src_coord);
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tex->src[1].src_type = nir_tex_src_lod;
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tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0));
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tex->dest_type = nir_type_float;
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tex->is_array = false;
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tex->coord_components = 2;
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tex->texture = nir_deref_var_create(tex, input_img);
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tex->sampler = NULL;
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nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
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nir_builder_instr_insert(&b, &tex->instr);
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nir_ssa_def *outval = &tex->dest.ssa;
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nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store);
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store->src[0] = nir_src_for_ssa(dst_coord);
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store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
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store->src[2] = nir_src_for_ssa(outval);
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store->variables[0] = nir_deref_var_create(store, output_img);
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nir_builder_instr_insert(&b, &store->instr);
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return b.shader;
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}
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/* image to image - don't write use image accessors */
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static VkResult
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radv_device_init_meta_itoi_state(struct radv_device *device)
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{
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VkResult result;
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struct radv_shader_module cs = { .nir = NULL };
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zero(device->meta_state.itoi);
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cs.nir = build_nir_itoi_compute_shader(device);
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/*
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* two descriptors one for the image being sampled
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* one for the buffer being written.
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*/
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VkDescriptorSetLayoutCreateInfo ds_create_info = {
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.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
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.bindingCount = 2,
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.pBindings = (VkDescriptorSetLayoutBinding[]) {
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{
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.binding = 0,
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.descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
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.descriptorCount = 1,
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.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
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.pImmutableSamplers = NULL
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},
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{
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.binding = 1,
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.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
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.descriptorCount = 1,
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.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
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.pImmutableSamplers = NULL
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},
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}
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};
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result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device),
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&ds_create_info,
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&device->meta_state.alloc,
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&device->meta_state.itoi.img_ds_layout);
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if (result != VK_SUCCESS)
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goto fail;
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VkPipelineLayoutCreateInfo pl_create_info = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
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.setLayoutCount = 1,
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.pSetLayouts = &device->meta_state.itoi.img_ds_layout,
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.pushConstantRangeCount = 1,
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.pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 16},
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};
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result = radv_CreatePipelineLayout(radv_device_to_handle(device),
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&pl_create_info,
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&device->meta_state.alloc,
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&device->meta_state.itoi.img_p_layout);
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if (result != VK_SUCCESS)
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goto fail;
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/* compute shader */
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VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_COMPUTE_BIT,
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.module = radv_shader_module_to_handle(&cs),
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.pName = "main",
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.pSpecializationInfo = NULL,
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};
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VkComputePipelineCreateInfo vk_pipeline_info = {
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.sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO,
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.stage = pipeline_shader_stage,
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.flags = 0,
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.layout = device->meta_state.itoi.img_p_layout,
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};
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result = radv_CreateComputePipelines(radv_device_to_handle(device),
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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1, &vk_pipeline_info, NULL,
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&device->meta_state.itoi.pipeline);
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if (result != VK_SUCCESS)
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goto fail;
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ralloc_free(cs.nir);
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return VK_SUCCESS;
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fail:
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ralloc_free(cs.nir);
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return result;
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}
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static void
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radv_device_finish_meta_itoi_state(struct radv_device *device)
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{
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if (device->meta_state.itoi.img_p_layout) {
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radv_DestroyPipelineLayout(radv_device_to_handle(device),
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device->meta_state.itoi.img_p_layout,
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&device->meta_state.alloc);
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}
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if (device->meta_state.itoi.img_ds_layout) {
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radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
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device->meta_state.itoi.img_ds_layout,
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&device->meta_state.alloc);
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}
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if (device->meta_state.itoi.pipeline) {
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radv_DestroyPipeline(radv_device_to_handle(device),
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device->meta_state.itoi.pipeline,
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&device->meta_state.alloc);
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}
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}
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void
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radv_device_finish_meta_bufimage_state(struct radv_device *device)
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{
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radv_device_finish_meta_itob_state(device);
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radv_device_finish_meta_btoi_state(device);
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radv_device_finish_meta_itoi_state(device);
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}
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VkResult
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@ -441,9 +631,30 @@ radv_device_init_meta_bufimage_state(struct radv_device *device)
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radv_device_finish_meta_itob_state(device);
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return result;
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}
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result = radv_device_init_meta_itoi_state(device);
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if (result != VK_SUCCESS) {
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radv_device_finish_meta_itob_state(device);
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radv_device_finish_meta_btoi_state(device);
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return result;
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}
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return VK_SUCCESS;
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}
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void
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radv_meta_begin_itoi(struct radv_cmd_buffer *cmd_buffer,
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struct radv_meta_saved_compute_state *save)
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{
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radv_meta_save_compute(save, cmd_buffer, 16);
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}
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void
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radv_meta_end_itoi(struct radv_cmd_buffer *cmd_buffer,
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struct radv_meta_saved_compute_state *save)
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{
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radv_meta_restore_compute(save, cmd_buffer, 16);
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}
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void
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radv_meta_begin_bufimage(struct radv_cmd_buffer *cmd_buffer,
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struct radv_meta_saved_compute_state *save)
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@ -691,3 +902,107 @@ radv_meta_buffer_to_image_cs(struct radv_cmd_buffer *cmd_buffer,
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}
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radv_temp_descriptor_set_destroy(cmd_buffer->device, temps.set);
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}
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struct itoi_temps {
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struct radv_image_view src_iview;
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struct radv_image_view dst_iview;
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VkDescriptorSet set;
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};
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static void
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itoi_bind_descriptors(struct radv_cmd_buffer *cmd_buffer,
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struct itoi_temps *tmp)
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{
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struct radv_device *device = cmd_buffer->device;
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VkDevice vk_device = radv_device_to_handle(cmd_buffer->device);
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radv_temp_descriptor_set_create(device, cmd_buffer,
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device->meta_state.itoi.img_ds_layout,
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&tmp->set);
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radv_UpdateDescriptorSets(vk_device,
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2, /* writeCount */
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(VkWriteDescriptorSet[]) {
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{
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.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
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.dstSet = tmp->set,
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.dstBinding = 0,
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.dstArrayElement = 0,
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.descriptorCount = 1,
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.descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
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.pImageInfo = (VkDescriptorImageInfo[]) {
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{
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.sampler = NULL,
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.imageView = radv_image_view_to_handle(&tmp->src_iview),
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.imageLayout = VK_IMAGE_LAYOUT_GENERAL,
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},
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}
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},
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{
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.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
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.dstSet = tmp->set,
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.dstBinding = 1,
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.dstArrayElement = 0,
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.descriptorCount = 1,
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.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
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.pImageInfo = (VkDescriptorImageInfo[]) {
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{
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.sampler = NULL,
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.imageView = radv_image_view_to_handle(&tmp->dst_iview),
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.imageLayout = VK_IMAGE_LAYOUT_GENERAL,
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},
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}
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}
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}, 0, NULL);
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radv_CmdBindDescriptorSets(radv_cmd_buffer_to_handle(cmd_buffer),
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VK_PIPELINE_BIND_POINT_COMPUTE,
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device->meta_state.itoi.img_p_layout, 0, 1,
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&tmp->set, 0, NULL);
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}
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static void
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itoi_bind_pipeline(struct radv_cmd_buffer *cmd_buffer)
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{
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VkPipeline pipeline =
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cmd_buffer->device->meta_state.itoi.pipeline;
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if (cmd_buffer->state.compute_pipeline != radv_pipeline_from_handle(pipeline)) {
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radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
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VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
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}
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}
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void
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radv_meta_image_to_image_cs(struct radv_cmd_buffer *cmd_buffer,
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struct radv_meta_blit2d_surf *src,
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struct radv_meta_blit2d_surf *dst,
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unsigned num_rects,
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struct radv_meta_blit2d_rect *rects)
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{
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struct radv_device *device = cmd_buffer->device;
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struct itoi_temps temps;
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create_iview(cmd_buffer, src, VK_IMAGE_USAGE_SAMPLED_BIT, &temps.src_iview);
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create_iview(cmd_buffer, dst, VK_IMAGE_USAGE_STORAGE_BIT, &temps.dst_iview);
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itoi_bind_descriptors(cmd_buffer, &temps);
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itoi_bind_pipeline(cmd_buffer);
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for (unsigned r = 0; r < num_rects; ++r) {
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unsigned push_constants[4] = {
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rects[r].src_x,
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rects[r].src_y,
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rects[r].dst_x,
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rects[r].dst_y,
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};
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radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
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device->meta_state.itoi.img_p_layout,
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VK_SHADER_STAGE_COMPUTE_BIT, 0, 16,
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push_constants);
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radv_unaligned_dispatch(cmd_buffer, rects[r].width, rects[r].height, 1);
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}
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radv_temp_descriptor_set_destroy(cmd_buffer->device, temps.set);
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}
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@ -325,7 +325,8 @@ meta_copy_image(struct radv_cmd_buffer *cmd_buffer,
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uint32_t regionCount,
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const VkImageCopy *pRegions)
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{
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struct radv_meta_saved_state saved_state;
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bool cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE;
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union meta_saved_state saved_state;
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/* From the Vulkan 1.0 spec:
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*
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@ -333,8 +334,10 @@ meta_copy_image(struct radv_cmd_buffer *cmd_buffer,
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* images, but both images must have the same number of samples.
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*/
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assert(src_image->samples == dest_image->samples);
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radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer);
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if (cs)
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radv_meta_begin_itoi(cmd_buffer, &saved_state.compute);
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else
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radv_meta_save_graphics_reset_vport_scissor(&saved_state.gfx, cmd_buffer);
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for (unsigned r = 0; r < regionCount; r++) {
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assert(pRegions[r].srcSubresource.aspectMask ==
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@ -388,7 +391,10 @@ meta_copy_image(struct radv_cmd_buffer *cmd_buffer,
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rect.src_y = src_offset_el.y;
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/* Perform Blit */
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radv_meta_blit2d(cmd_buffer, &b_src, NULL, &b_dst, 1, &rect);
|
||||
if (cs)
|
||||
radv_meta_image_to_image_cs(cmd_buffer, &b_src, &b_dst, 1, &rect);
|
||||
else
|
||||
radv_meta_blit2d(cmd_buffer, &b_src, NULL, &b_dst, 1, &rect);
|
||||
|
||||
b_src.layer++;
|
||||
b_dst.layer++;
|
||||
|
|
@ -399,7 +405,10 @@ meta_copy_image(struct radv_cmd_buffer *cmd_buffer,
|
|||
}
|
||||
}
|
||||
|
||||
radv_meta_restore(&saved_state, cmd_buffer);
|
||||
if (cs)
|
||||
radv_meta_end_itoi(cmd_buffer, &saved_state.compute);
|
||||
else
|
||||
radv_meta_restore(&saved_state.gfx, cmd_buffer);
|
||||
}
|
||||
|
||||
void radv_CmdCopyImage(
|
||||
|
|
|
|||
|
|
@ -397,6 +397,11 @@ struct radv_meta_state {
|
|||
VkDescriptorSetLayout img_ds_layout;
|
||||
VkPipeline pipeline;
|
||||
} btoi;
|
||||
struct {
|
||||
VkPipelineLayout img_p_layout;
|
||||
VkDescriptorSetLayout img_ds_layout;
|
||||
VkPipeline pipeline;
|
||||
} itoi;
|
||||
|
||||
struct {
|
||||
VkPipeline pipeline;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue