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i965: Fix flipped GT1 vs GT2 URB VS entry count limits.

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This commit is contained in:
Eric Anholt 2011-06-05 23:20:57 -07:00
parent 7d2cb9a53c
commit ef59049c52
1 changed files with 2 additions and 2 deletions
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4
src/mesa/drivers/dri/i965/brw_context.c
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@ -203,12 +203,12 @@ GLboolean brwCreateContext( int api,
brw->wm_max_threads = 40;
brw->vs_max_threads = 60;
brw->urb.size = 64; /* volume 5c.5 section 5.1 */
brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
} else {
brw->wm_max_threads = 40;
brw->vs_max_threads = 24;
brw->urb.size = 32; /* volume 5c.5 section 5.1 */
brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
}
} else if (intel->gen == 5) {
brw->urb.size = 1024;