nir: Add AMD-specific buffer load/store intrinsics.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
This commit is contained in:
Timur Kristóf 2021-01-25 19:12:18 +01:00 committed by Marge Bot
parent c2a81ebe19
commit eee3435757
2 changed files with 14 additions and 0 deletions

View file

@ -287,6 +287,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
case nir_intrinsic_load_constant:
case nir_intrinsic_load_sample_pos_from_id:
case nir_intrinsic_load_kernel_input:
case nir_intrinsic_load_buffer_amd:
case nir_intrinsic_image_samples:
case nir_intrinsic_image_deref_samples:
case nir_intrinsic_bindless_image_samples:

View file

@ -213,6 +213,12 @@ index("nir_alu_type", "dest_type")
# The swizzle mask for quad_swizzle_amd & masked_swizzle_amd
index("unsigned", "swizzle_mask")
# Whether the load_buffer_amd/store_buffer_amd is swizzled
index("bool", "is_swizzled")
# The SLC ("system level coherent") bit of load_buffer_amd/store_buffer_amd
index("bool", "slc_amd")
# Separate source/dest access flags for copies
index("enum gl_access_qualifier", "dst_access")
index("enum gl_access_qualifier", "src_access")
@ -1128,6 +1134,13 @@ intrinsic("load_local_shared_r600", src_comp=[0], dest_comp=0, indices = [], fla
store("local_shared_r600", [1], [WRITE_MASK])
store("tf_r600", [])
# AMD GCN/RDNA specific intrinsics
# src[] = { descriptor, base address, scalar offset }
intrinsic("load_buffer_amd", src_comp=[4, 1, 1], dest_comp=0, indices=[BASE, IS_SWIZZLED, SLC_AMD, MEMORY_MODES], flags=[CAN_ELIMINATE])
# src[] = { store value, descriptor, base address, scalar offset }
intrinsic("store_buffer_amd", src_comp=[0, 4, 1, 1], indices=[BASE, WRITE_MASK, IS_SWIZZLED, SLC_AMD, MEMORY_MODES])
# V3D-specific instrinc for tile buffer color reads.
#
# The hardware requires that we read the samples and components of a pixel