lima: ppir: index SSA nodes the same way as we index registers

var_nodes size is x4 of nir defs count, since we need to track a node
for each individual channel of a register write. We don't need that for
SSA, but we used non-shifted indices for SSA, which made the compiler
reliant of reg nir def indeces to start after all the SSA indices.

That has changed with 7b70b419b528("nir: always index SSA defs before
printing").

Fix that by shifting SSA index as well, that would allow not to rely on
any assumptions on nir def indices.

Backport-to: 25.2
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36206>
(cherry picked from commit 2e38cbc40c)
This commit is contained in:
Vasily Khoruzhick 2025-07-16 21:34:01 -07:00 committed by Eric Engestrom
parent 02a6e9137f
commit eec4d7bb69
3 changed files with 5 additions and 5 deletions

View file

@ -2314,7 +2314,7 @@
"description": "lima: ppir: index SSA nodes the same way as we index registers",
"nominated": true,
"nomination_type": 4,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": null,
"notes": null

View file

@ -98,7 +98,7 @@ static void ppir_node_add_src(ppir_compiler *comp, ppir_node *node,
nir_intrinsic_instr *load = nir_load_reg_for_def(ns->ssa);
if (!load) { /* is ssa */
child = comp->var_nodes[ns->ssa->index];
child = comp->var_nodes[ns->ssa->index << 2];
if (child->op != ppir_op_undef)
ppir_node_add_dep(node, child, ppir_dep_src);
}
@ -444,7 +444,7 @@ static bool ppir_emit_intrinsic(ppir_block *block, nir_instr *ni)
}
if (!block->comp->uses_discard) {
node = block->comp->var_nodes[instr->src->ssa->index];
node = block->comp->var_nodes[instr->src->ssa->index << 2];
assert(node);
switch (node->op) {
case ppir_op_load_uniform:
@ -598,7 +598,7 @@ static bool ppir_emit_tex(ppir_block *block, nir_instr *ni)
FALLTHROUGH;
case nir_tex_src_coord: {
nir_src *ns = &instr->src[i].src;
ppir_node *child = block->comp->var_nodes[ns->ssa->index];
ppir_node *child = block->comp->var_nodes[ns->ssa->index << 2];
if (child->op == ppir_op_load_varying) {
/* If the successor is load_texture, promote it to load_coords */
nir_tex_src *nts = (nir_tex_src *)ns;

View file

@ -381,7 +381,7 @@ void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask)
comp->var_nodes[(index << 2) + u_bit_scan(&mask)] = node;
snprintf(node->name, sizeof(node->name), "reg%d", index);
} else {
comp->var_nodes[index] = node;
comp->var_nodes[index << 2] = node;
snprintf(node->name, sizeof(node->name), "ssa%d", index);
}
}