From ee0e7b8347eaf245908d02838c53852344c9f8d9 Mon Sep 17 00:00:00 2001
From: Mary Guillemard <mary@mary.zone>
Date: Fri, 27 Oct 2023 20:27:10 +0200
Subject: [PATCH] agx: Add doorbell and stack mapping opcodes

Signed-off-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26056>
---
 src/asahi/compiler/agx_opcodes.py |  6 ++++++
 src/asahi/compiler/agx_pack.c     | 36 +++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+)

diff --git a/src/asahi/compiler/agx_opcodes.py b/src/asahi/compiler/agx_opcodes.py
index 1467a71507c..164911cb03a 100644
--- a/src/asahi/compiler/agx_opcodes.py
+++ b/src/asahi/compiler/agx_opcodes.py
@@ -421,6 +421,12 @@ memory_barrier("image_barrier_4", 3, 1, 10)
 
 memory_barrier("flush_memory_to_texture", 0, 0, 4)
 
+op("doorbell", (0x60020 | 0x28 << 32, (1 << 48) - 1, 6, _), dests = 0,
+      can_eliminate = False, can_reorder = False, imms = [IMM])
+
+op("stack_unmap", (0x00075, (1 << 24) - 1, 8, _), dests = 1, srcs = 0, can_eliminate = False, can_reorder = False, imms = [IMM])
+op("stack_map",   (0x10075, (1 << 24) - 1, 8, _), dests = 0, srcs = 1, can_eliminate = False, can_reorder = False, imms = [IMM])
+
 # Convenient aliases.
 op("mov", _, srcs = 1)
 op("not", _, srcs = 1)
diff --git a/src/asahi/compiler/agx_pack.c b/src/asahi/compiler/agx_pack.c
index 283ce8eba5d..1f4b32554f9 100644
--- a/src/asahi/compiler/agx_pack.c
+++ b/src/asahi/compiler/agx_pack.c
@@ -967,6 +967,42 @@ agx_pack_instr(struct util_dynarray *emission, struct util_dynarray *fixups,
       break;
    }
 
+   case AGX_OPCODE_DOORBELL: {
+      assert(I->imm < BITFIELD_MASK(8));
+      struct agx_opcode_info info = agx_opcodes_info[I->op];
+      uint64_t raw = info.encoding.exact | (I->imm << 40);
+      memcpy(util_dynarray_grow_bytes(emission, 1, 6), &raw, 6);
+      break;
+   }
+
+   case AGX_OPCODE_STACK_UNMAP:
+   case AGX_OPCODE_STACK_MAP: {
+      agx_index value = I->op == AGX_OPCODE_STACK_MAP ? I->src[0] : I->dest[0];
+
+      assert(value.type == AGX_INDEX_REGISTER);
+      assert(value.size == AGX_SIZE_32);
+      assert(I->imm < BITFIELD_MASK(16));
+
+      unsigned q1 = 0;  // XXX
+      unsigned q2 = 0;  // XXX
+      unsigned q3 = 0;  // XXX
+      unsigned q4 = 16; // XXX
+      unsigned q5 = 16; // XXX
+
+      struct agx_opcode_info info = agx_opcodes_info[I->op];
+      uint64_t raw =
+         info.encoding.exact | (q1 << 8) | ((value.value & 0x1F) << 11) |
+         ((I->imm & 0xF) << 20) | (1UL << 24) | // XXX
+         (1UL << 26) |                          // XXX
+         (q2 << 30) | ((uint64_t)((I->imm >> 4) & 0xF) << 32) |
+         ((uint64_t)q3 << 37) | ((uint64_t)(value.value >> 5) << 40) |
+         ((uint64_t)q4 << 42) | (1UL << 47) | // XXX
+         ((uint64_t)q5 << 48) | ((uint64_t)(I->imm >> 8) << 56);
+
+      memcpy(util_dynarray_grow_bytes(emission, 1, 8), &raw, 8);
+      break;
+   }
+
    default:
       agx_pack_alu(emission, I);
       return;