anv: add custom mi write fences

The mi-builder already takes care of mi write/read fences, but we have
a few cases in Anv where we also need to fence mi-write ->
shader-read.

We also have one case where a command buffer jump address is modified
by a previous mi write command.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29595>

src/intel/vulkan/genX_cmd_buffer.c

@@ -5870,6 +5870,11 @@ void genX(batch_emit_secondary_call)(struct anv_batch *batch,
    struct mi_reloc_imm_token reloc =
       mi_store_relocated_imm(&b, mi_mem64(secondary_return_addr));
 
+   /* Ensure the write have landed before CS reads the address written
+    * above
+    */
+   mi_ensure_write_fence(&b);
+
 #if GFX_VER >= 12
    /* Disable prefetcher before jumping into a secondary */
    anv_batch_emit(batch, GENX(MI_ARB_CHECK), arb) {

src/intel/vulkan/genX_cmd_draw_generated_indirect.h

@@ -586,6 +586,9 @@ genX(cmd_buffer_emit_indirect_generated_draws_inring)(struct anv_cmd_buffer *cmd
                    mi_iadd(&b, mi_mem32(draw_base_addr),
                                mi_imm(ring_count)));
 
+      /* Make sure the MI writes are globally observable */
+      mi_ensure_write_fence(&b);
+
       anv_add_pending_pipe_bits(cmd_buffer,
                                 ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT,
                                 "after generated draws batch increment");
@@ -605,6 +608,9 @@ genX(cmd_buffer_emit_indirect_generated_draws_inring)(struct anv_cmd_buffer *cmd
       /* Reset the draw_base field in case we ever replay the command buffer. */
       mi_store(&b, mi_mem32(draw_base_addr), mi_imm(0));
 
+      /* Make sure the MI writes are globally observable */
+      mi_ensure_write_fence(&b);
+
       anv_add_pending_pipe_bits(cmd_buffer,
                                 ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT,
                                 "after generated draws end");

src/intel/vulkan/genX_query.c

@@ -1739,6 +1739,11 @@ copy_query_results_with_shader(struct anv_cmd_buffer *cmd_buffer,
 
    trace_intel_begin_query_copy_shader(&cmd_buffer->trace);
 
+   /* Ensure all query MI writes are visible to the shader */
+   struct mi_builder b;
+   mi_builder_init(&b, cmd_buffer->device->info, &cmd_buffer->batch);
+   mi_ensure_write_fence(&b);
+
    /* If this is the first command in the batch buffer, make sure we have
     * consistent pipeline mode.
     */