fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-20 16:00:08 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

anv: implement autostrip disable for Wa_14024997852

Browse source 
Note that currently autostrip is disabled globally with
Wa_14021490052 for some gfx versions and steppings.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37975>
This commit is contained in:
Tapani Pälli 2025-09-01 15:47:37 +03:00 • committed by Marge Bot
parent 7d9cf48fd7
commit ed34f91545
5 changed files with 64 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/intel/vulkan/anv_device.c
View file

@ -972,6 +972,8 @@ VkResult anv_CreateDevice(
if (device->info->ver > 9)
BITSET_CLEAR(device->gfx_dirty_state, ANV_GFX_STATE_PMA_FIX);
BITSET_CLEAR(device->gfx_dirty_state, ANV_GFX_STATE_WA_14024997852);
device->queue_count = 0;
for (uint32_t i = 0; i < pCreateInfo->queueCreateInfoCount; i++) {
const VkDeviceQueueCreateInfo *queueCreateInfo =

3
src/intel/vulkan/anv_genX.h
View file

@ -190,6 +190,9 @@ genX(cmd_buffer_state_cache_inval_wa_14025112257)(
}
}
void
genX(setup_autostrip_state)(struct anv_cmd_buffer *cmd_buffer, bool enable);
void genX(emit_so_memcpy_init)(struct anv_memcpy_state *state,
struct anv_device *device,
struct anv_cmd_buffer *cmd_buffer,

6
src/intel/vulkan/anv_private.h
View file

@ -1870,6 +1870,7 @@ enum anv_gfx_state_bits {
ANV_GFX_STATE_WA_18019816803, /* Fake state to implement workaround */
ANV_GFX_STATE_WA_14018283232, /* Fake state to implement workaround */
ANV_GFX_STATE_WA_18038825448, /* Fake state to implement workaround */
ANV_GFX_STATE_WA_14024997852, /* Fake state to implement workaround */
ANV_GFX_STATE_TBIMR_TILE_PASS_INFO,
ANV_GFX_STATE_FS_MSAA_FLAGS,
ANV_GFX_STATE_TESS_CONFIG,
@ -2308,6 +2309,11 @@ struct anv_gfx_dynamic_state {
*/
enum anv_coarse_pixel_state coarse_state;
/**
* State tracking for Wa_14024997852.
*/
bool autostrip_disabled;
/** Dirty bits of what needs to be repacked */
BITSET_DECLARE(pack_dirty, ANV_GFX_STATE_MAX);

6
src/intel/vulkan/genX_cmd_buffer.c
View file

@ -3427,6 +3427,12 @@ end_command_buffer(struct anv_cmd_buffer *cmd_buffer)
*/
genX(cmd_buffer_enable_pma_fix)(cmd_buffer, false);
#if INTEL_WA_14024997852_GFX_VER
/* Toggle autostrip on if we disabled it. */
if (cmd_buffer->state.gfx.dyn_state.autostrip_disabled)
genX(setup_autostrip_state)(cmd_buffer, true);
#endif
/* Wa_14015814527
*
* Apply task URB workaround in the end of primary or secondary cmd_buffer.

47
src/intel/vulkan/genX_gfx_state.c
View file

@ -2530,6 +2530,20 @@ cmd_buffer_flush_gfx_runtime_state(struct anv_gfx_dynamic_state *hw_state,
}
#endif
#if INTEL_WA_14024997852_GFX_VER
/* Wa_14024997852: When Draw Cut Index or primitive id is enabled
* and topology is tri list, we need to disable autostrip.
*
* Note that we do not take primitive id in to account because it
* is mentioned only in xe2 clone of this wa and autostrip has been
* disabled globally on xe2 (+xe3 a0) by kernel due to 14021490052
* workaround.
*/
SET(WA_14024997852, autostrip_disabled,
hw_state->vft.PrimitiveTopologyType == _3DPRIM_TRILIST &&
dyn->ia.primitive_restart_enable);
#endif
/* If the pipeline uses a dynamic value of patch_control_points or the
* tessellation domain is dynamic and either the pipeline change or the
* dynamic value change, check the value and reemit if needed.
@ -2579,6 +2593,32 @@ cmd_buffer_flush_gfx_runtime_state(struct anv_gfx_dynamic_state *hw_state,
#undef SET_STAGE
#undef SETUP_PROVOKING_VERTEX
#if INTEL_WA_14024997852_GFX_VER
void
genX(setup_autostrip_state)(struct anv_cmd_buffer *cmd_buffer, bool enable)
{
/* Add CS stall before writing registers. */
genx_batch_emit_pipe_control(&cmd_buffer->batch,
cmd_buffer->device->info,
cmd_buffer->state.current_pipeline,
ANV_PIPE_CS_STALL_BIT);
/* VF */
anv_batch_write_reg(&cmd_buffer->batch, GENX(VFL_SCRATCH_PAD), vfl) {
vfl.AutostripDisable = !enable;
vfl.PartialAutostripDisable = !enable;
vfl.AutostripDisableMask = true;
vfl.PartialAutostripDisableMask = true;
}
/* TE and Mesh. */
anv_batch_write_reg(&cmd_buffer->batch, GENX(FF_MODE), ff) {
ff.TEAutostripDisable = !enable;
ff.MeshShaderAutostripDisable = !enable;
ff.MeshShaderPartialAutostripDisable = !enable;
}
}
#endif /* INTEL_WA_14024997852_GFX_VER */
static void
cmd_buffer_repack_gfx_state(struct anv_gfx_dynamic_state *hw_state,
struct anv_cmd_buffer *cmd_buffer,
@ -3601,6 +3641,13 @@ cmd_buffer_gfx_state_emission(struct anv_cmd_buffer *cmd_buffer)
gfx->base.push_constants_data_dirty = true;
}
#if INTEL_WA_14024997852_GFX_VER
if (IS_DIRTY(WA_14024997852) &&
intel_needs_workaround(device->info, 14024997852)) {
genX(setup_autostrip_state)(cmd_buffer, !hw_state->autostrip_disabled);
}
#endif
#if INTEL_WA_18019110168_GFX_VER
if (IS_DIRTY(MESH_PROVOKING_VERTEX))
cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_MESH_BIT_EXT;