diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index e93ebdafadb..d69c3ef1d89 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -522,7 +522,10 @@ ac_fill_memory_info(struct radeon_info *info, const struct drm_amdgpu_info_devic
    /* Add some margin of error, though this shouldn't be needed in theory. */
    info->all_vram_visible = info->vram_size_kb * 0.9 < info->vram_vis_size_kb;
 
+   info->high_va_offset = device_info->high_va_offset;
+   info->high_va_max = device_info->high_va_max;
    info->virtual_address_max = device_info->virtual_address_max;
+   info->virtual_address_alignment = device_info->virtual_address_alignment;
    /* Set which chips have dedicated VRAM. */
    info->has_dedicated_vram = !(device_info->ids_flags & AMDGPU_IDS_FLAGS_FUSION);
    /* The kernel can split large buffers in VRAM but not in GTT, so large
@@ -1909,7 +1912,10 @@ void ac_print_gpu_info(FILE *f, const struct radeon_info *info, int fd)
    fprintf(f, "    address32_hi = 0x%x\n", info->address32_hi);
    fprintf(f, "    has_dedicated_vram = %u\n", info->has_dedicated_vram);
    fprintf(f, "    all_vram_visible = %u\n", info->all_vram_visible);
+   fprintf(f, "    high_va_offset = %" PRIx64 "\n", info->high_va_offset);
+   fprintf(f, "    high_va_max = %" PRIx64 "\n", info->high_va_max);
    fprintf(f, "    virtual_address_max = %" PRIx64 "\n", info->virtual_address_max);
+   fprintf(f, "    virtual_address_alignment = %" PRIx64 "\n", info->virtual_address_alignment);
    fprintf(f, "    max_tcc_blocks = %i\n", info->max_tcc_blocks);
    fprintf(f, "    tcc_cache_line_size = %u\n", info->tcc_cache_line_size);
    fprintf(f, "    tcc_rb_non_coherent = %u\n", info->tcc_rb_non_coherent);
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 90cab9908d3..9a0e4677b44 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -317,7 +317,10 @@ struct radeon_info {
    uint32_t address32_hi;
    bool has_dedicated_vram;
    bool all_vram_visible;
+   uint64_t high_va_offset;
+   uint64_t high_va_max;
    uint64_t virtual_address_max;
+   uint64_t virtual_address_alignment;
    bool has_l2_uncached;
    bool r600_has_virtual_memory;
    uint32_t max_tcc_blocks;