From ecf2e33760f9de3ac6d66558f686c5b574db67a2 Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Thu, 4 Jan 2018 01:45:15 +0100 Subject: [PATCH] radv: Invalidate L1 for VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT. These are just shaders reads, so we need to invalidate L1. Fixes: 6dbb0eaccc "radv: handle subpass cache flushes" Reviewed-by: Samuel Pitoiset (cherry picked from commit f2c9f13ec2fdab99f5aa7f32845ee94dd1942fe9) --- src/amd/vulkan/radv_cmd_buffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index e5e781f6f8d..dbae1d79ed9 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1919,11 +1919,11 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer, switch ((VkAccessFlagBits)(1 << b)) { case VK_ACCESS_INDIRECT_COMMAND_READ_BIT: case VK_ACCESS_INDEX_READ_BIT: - case VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT: break; case VK_ACCESS_UNIFORM_READ_BIT: flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1 | RADV_CMD_FLAG_INV_SMEM_L1; break; + case VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT: case VK_ACCESS_SHADER_READ_BIT: case VK_ACCESS_TRANSFER_READ_BIT: case VK_ACCESS_INPUT_ATTACHMENT_READ_BIT: