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ac: add load_sample_mask_in() to the ABI

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset 2018-02-09 13:54:22 +01:00
parent 0f48eeea05
commit ecf229706f
3 changed files with 17 additions and 8 deletions
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17
src/amd/common/ac_nir_to_llvm.c
View file

@ -4022,9 +4022,12 @@ static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
return ac_build_gather_values(&ctx->ac, values, 2);
}
static LLVMValueRef load_sample_mask_in(struct ac_nir_context *ctx)
static LLVMValueRef load_sample_mask_in(struct ac_shader_abi *abi)
{
uint8_t log2_ps_iter_samples = ctx->nctx->shader_info->info.ps.force_persample ? ctx->nctx->options->key.fs.log2_num_samples : ctx->nctx->options->key.fs.log2_ps_iter_samples;
struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
uint8_t log2_ps_iter_samples = ctx->shader_info->info.ps.force_persample ?
ctx->options->key.fs.log2_num_samples :
ctx->options->key.fs.log2_ps_iter_samples;
/* The bit pattern matches that used by fixed function fragment
* processing. */
@ -4040,9 +4043,9 @@ static LLVMValueRef load_sample_mask_in(struct ac_nir_context *ctx)
uint32_t ps_iter_mask = ps_iter_masks[log2_ps_iter_samples];
LLVMValueRef result, sample_id;
sample_id = unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
sample_id = unpack_param(&ctx->ac, abi->ancillary, 8, 4);
sample_id = LLVMBuildShl(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, ps_iter_mask, false), sample_id, "");
result = LLVMBuildAnd(ctx->ac.builder, sample_id, ctx->abi->sample_coverage, "");
result = LLVMBuildAnd(ctx->ac.builder, sample_id, abi->sample_coverage, "");
return result;
}
@ -4353,10 +4356,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
result = load_sample_pos(ctx);
break;
case nir_intrinsic_load_sample_mask_in:
if (ctx->nctx)
result = load_sample_mask_in(ctx);
else
result = ctx->abi->sample_coverage;
result = ctx->abi->load_sample_mask_in(ctx->abi);
break;
case nir_intrinsic_load_frag_coord: {
LLVMValueRef values[4] = {
@ -6827,6 +6827,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
shader_info->fs.can_discard = shaders[i]->info.fs.uses_discard;
ctx.abi.lookup_interp_param = lookup_interp_param;
ctx.abi.load_sample_position = load_sample_position;
ctx.abi.load_sample_mask_in = load_sample_mask_in;
}
if (i)

2
src/amd/common/ac_shader_abi.h
View file

@ -165,6 +165,8 @@ struct ac_shader_abi {
LLVMValueRef (*load_local_group_size)(struct ac_shader_abi *abi);
LLVMValueRef (*load_sample_mask_in)(struct ac_shader_abi *abi);
/* Whether to clamp the shadow reference value to [0,1]on VI. Radeonsi currently
* uses it due to promoting D16 to D32, but radv needs it off. */
bool clamp_shadow_reference;

6
src/gallium/drivers/radeonsi/si_shader.c
View file

@ -1934,6 +1934,11 @@ static LLVMValueRef load_sample_position(struct ac_shader_abi *abi, LLVMValueRef
return lp_build_gather_values(&ctx->gallivm, pos, 4);
}
static LLVMValueRef load_sample_mask_in(struct ac_shader_abi *abi)
{
return abi->sample_coverage;
}
static LLVMValueRef si_load_tess_coord(struct ac_shader_abi *abi,
LLVMTypeRef type,
unsigned num_components)
@ -5960,6 +5965,7 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx,
bld_base->emit_epilogue = si_tgsi_emit_epilogue;
ctx->abi.lookup_interp_param = si_nir_lookup_interp_param;
ctx->abi.load_sample_position = load_sample_position;
ctx->abi.load_sample_mask_in = load_sample_mask_in;
break;
case PIPE_SHADER_COMPUTE:
ctx->abi.load_local_group_size = get_block_size;