From ec74a1361841140c87e617eb14d4d764104fc930 Mon Sep 17 00:00:00 2001 From: Gert Wollny Date: Fri, 26 Feb 2021 22:15:15 +0100 Subject: [PATCH] r600/sfn: Update status Signed-off-by: Gert Wollny Part-of: --- src/gallium/drivers/r600/sfn/sfn_docu.txt | 31 ++++++++++------------- 1 file changed, 14 insertions(+), 17 deletions(-) diff --git a/src/gallium/drivers/r600/sfn/sfn_docu.txt b/src/gallium/drivers/r600/sfn/sfn_docu.txt index 027c1502a8a..97a9c36580a 100644 --- a/src/gallium/drivers/r600/sfn/sfn_docu.txt +++ b/src/gallium/drivers/r600/sfn/sfn_docu.txt @@ -4,6 +4,14 @@ This code is an attempt to implement a NIR backend for r600. ## State +Supported hardware: Evergreen and NI (tested on CEDAR and BARTS) + +Thanks to soft fp64 the OpenGL version is now 4.5 + +sb has been enabled for nir to be able to run some more demanding work loads. The aim is +still to get rid of it. + + piglits gpu passes mostly like with TGSI, there are some fixes but also a few regressions. CTS gles @@ -11,12 +19,15 @@ CTS gles - 3 no regressions, a few fixes compared to TGSI - 31 * a few fixes with interpolation specifiers - * a few regressions with separate_shader.random * synchronization has some unstable tests, this might be because global synchronization is missing (in both) -## Currently missing features w.r.t. TGSI: +GL CTS: + * a few regressions and a hang with KHR-GL43.compute_shader.shared-max - - struct support +piglit: + * spilling arrays is broken on Barts (but it works on Cedar) + * a few tests fail because the register limit is exhausted, and needlessly so, because + with better RA it would work ## Needed optimizations: @@ -32,17 +43,3 @@ CTS gles but they are actually needed in the same registers they come from and could just be swizzled into the right place (lower in NIR like it is done in e.g. in ETNAVIV) - - -## Problems - - - struct IO is not lowered. lower_io would need a rewrite of most IO in - VS, GS, and FS - - fp64 needs additional lowering to replace load, split and merge with vec2 ops - nir_to_tgsi has some stuff there - -## Work plan - -The implementation uses C++ to separate the code for the different -shader types and the byte code generation backends. The initial attempt -will use the already available r600_asm code