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nvc0: add ARB_copy_image support

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Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Ilia Mirkin 2015-10-28 16:18:18 -04:00
parent 3bbb8715ac
commit ebbd7b41c0
3 changed files with 12 additions and 8 deletions
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2
docs/GL3.txt
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@ -153,7 +153,7 @@ GL 4.3, GLSL 4.30:
GL_ARB_ES3_compatibility DONE (all drivers that support GLSL 3.30)
GL_ARB_clear_buffer_object DONE (all drivers)
GL_ARB_compute_shader in progress (jljusten)
GL_ARB_copy_image DONE (i965, radeonsi)
GL_ARB_copy_image DONE (i965, nvc0, radeonsi)
GL_KHR_debug DONE (all drivers)
GL_ARB_explicit_uniform_location DONE (all drivers that support GLSL)
GL_ARB_fragment_layer_viewport DONE (nv50, nvc0, r600, radeonsi, llvmpipe)

2
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
View file

@ -179,6 +179,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
case PIPE_CAP_DEPTH_BOUNDS_TEST:
case PIPE_CAP_TGSI_TXQS:
case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
return 1;
case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
@ -203,7 +204,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
case PIPE_CAP_SHAREABLE_SHADERS:
case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
return 0;
case PIPE_CAP_VENDOR_ID:

16
src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
View file

@ -225,10 +225,14 @@ nvc0_resource_copy_region(struct pipe_context *pipe,
nv04_resource(dst)->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
if (m2mf) {
struct nv50_miptree *src_mt = nv50_miptree(src);
struct nv50_miptree *dst_mt = nv50_miptree(dst);
struct nv50_m2mf_rect drect, srect;
unsigned i;
unsigned nx = util_format_get_nblocksx(src->format, src_box->width);
unsigned ny = util_format_get_nblocksy(src->format, src_box->height);
unsigned nx = util_format_get_nblocksx(src->format, src_box->width)
<< src_mt->ms_x;
unsigned ny = util_format_get_nblocksy(src->format, src_box->height)
<< src_mt->ms_y;
nv50_m2mf_rect_setup(&drect, dst, dst_level, dstx, dsty, dstz);
nv50_m2mf_rect_setup(&srect, src, src_level,
@ -237,15 +241,15 @@ nvc0_resource_copy_region(struct pipe_context *pipe,
for (i = 0; i < src_box->depth; ++i) {
nvc0->m2mf_copy_rect(nvc0, &drect, &srect, nx, ny);
if (nv50_miptree(dst)->layout_3d)
if (dst_mt->layout_3d)
drect.z++;
else
drect.base += nv50_miptree(dst)->layer_stride;
drect.base += dst_mt->layer_stride;
if (nv50_miptree(src)->layout_3d)
if (src_mt->layout_3d)
srect.z++;
else
srect.base += nv50_miptree(src)->layer_stride;
srect.base += src_mt->layer_stride;
}
return;
}