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panfrost, panvk: The size of resource tables needs to be a multiple of 4.
The HW specifications require the size of shader resource tables to be a multiple of 4, otherwise correct behaviour is not guaranteed. Fixes:713f5c3600("panvk: Prepare the cmd_desc_state logic for Valhall") Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35553> (cherry picked from commit48e8d6d207)
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10 changed files with 42 additions and 7 deletions
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@ -8564,7 +8564,7 @@
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"description": "panfrost, panvk: The size of resource tables needs to be a multiple of 4.",
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"nominated": true,
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"nomination_type": 2,
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"resolution": 0,
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"resolution": 1,
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"main_sha": null,
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"because_sha": "713f5c3600f2e09beb6457fdca9295bfc1411413",
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"notes": null
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@ -285,7 +285,8 @@ panfrost_emit_resources(struct panfrost_batch *batch,
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{
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struct panfrost_context *ctx = batch->ctx;
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struct panfrost_ptr T;
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unsigned nr_tables = PAN_NUM_RESOURCE_TABLES;
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unsigned nr_tables =
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ALIGN_POT(PAN_NUM_RESOURCE_TABLES, MALI_RESOURCE_TABLE_SIZE_ALIGNMENT);
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/* Although individual resources need only 16 byte alignment, the
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* resource table as a whole must be 64-byte aligned.
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@ -1133,7 +1133,8 @@ pan_preload_emit_dcd(struct pan_fb_preload_cache *cache, struct pan_pool *pool,
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}
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#else
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struct panfrost_ptr T;
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unsigned nr_tables = PAN_BLIT_NUM_RESOURCE_TABLES;
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unsigned nr_tables = ALIGN_POT(PAN_BLIT_NUM_RESOURCE_TABLES,
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MALI_RESOURCE_TABLE_SIZE_ALIGNMENT);
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/* Although individual resources need only 16 byte alignment, the
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* resource table as a whole must be 64-byte aligned.
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@ -1813,6 +1813,8 @@
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<field name="Shader" start="10:0" size="64" type="address"/>
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<field name="Thread storage" start="12:0" size="64" type="address"/>
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<field name="FAU" start="14:0" size="64" type="address"/>
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<value name="Mali resource table size alignment" value="4"/>
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</struct>
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<struct name="Compute size workgroup" size="4">
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@ -2176,6 +2176,8 @@
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<field name="Fragment Shader" start="26:0" size="64" type="address"/>
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<field name="Thread storage" start="28:0" size="64" type="address"/>
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<field name="Fragment FAU" start="30:0" size="64" type="FAU Pointer"/>
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<value name="Mali resource table size alignment" value="4"/>
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</struct>
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<struct name="Primitive Size" size="2">
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@ -2488,6 +2488,8 @@
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<field name="Fragment Shader" start="26:0" size="64" type="address"/>
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<field name="Thread storage" start="28:0" size="64" type="address"/>
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<field name="Fragment FAU" start="30:0" size="64" type="FAU Pointer"/>
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<value name="Mali resource table size alignment" value="4"/>
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</struct>
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</panxml>
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@ -1327,6 +1327,8 @@
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<field name="Shader" start="10:0" size="64" type="address"/>
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<field name="Thread storage" start="12:0" size="64" type="address"/>
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<field name="FAU" start="14:0" size="64" type="address"/>
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<value name="Mali resource table size alignment" value="4"/>
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</struct>
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<struct name="Compute Payload" size="24">
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@ -41,6 +41,16 @@ struct panvk_shader_desc_state {
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#endif
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};
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#if PAN_ARCH >= 9
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static inline uint32_t
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panvk_shader_res_table_count(struct panvk_shader_desc_state *shader_desc_state)
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{
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uint32_t count = (shader_desc_state->res_table & BITFIELD_MASK(6));
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assert(count % MALI_RESOURCE_TABLE_SIZE_ALIGNMENT == 0);
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return count;
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}
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#endif
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struct panvk_push_set {
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struct panvk_cmd_pool_obj base;
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struct panvk_descriptor_set set;
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@ -282,7 +282,8 @@ panvk_per_arch(cmd_prepare_shader_res_table)(
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}
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uint32_t first_unused_set = util_last_bit(shader->desc_info.used_set_mask);
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uint32_t res_count = 1 + first_unused_set;
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uint32_t res_count =
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ALIGN_POT(1 + first_unused_set, MALI_RESOURCE_TABLE_SIZE_ALIGNMENT);
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struct panfrost_ptr ptr =
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panvk_cmd_alloc_desc_array(cmdbuf, res_count, RESOURCE);
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if (!ptr.gpu)
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@ -312,6 +313,14 @@ panvk_per_arch(cmd_prepare_shader_res_table)(
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cfg.size = 0;
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}
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}
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for (uint32_t i = first_unused_set + 1; i < res_count; i++) {
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pan_pack(&res_table[i], RESOURCE, cfg) {
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cfg.address = 0;
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cfg.contains_descriptors = false;
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cfg.size = 0;
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}
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}
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}
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shader_desc_state->res_table = ptr.gpu | res_count;
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@ -589,9 +589,15 @@ cmd_emit_dcd(struct panvk_cmd_buffer *cmdbuf, struct pan_fb_info *fbinfo,
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if (key->aspects == VK_IMAGE_ASPECT_COLOR_BIT)
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fill_bds(fbinfo, key, bds.cpu);
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struct panfrost_ptr res_table = panvk_cmd_alloc_desc(cmdbuf, RESOURCE);
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/* Resource table sizes need to be multiples of 4. We use only one
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* element here though.
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*/
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const uint32_t res_table_size = MALI_RESOURCE_TABLE_SIZE_ALIGNMENT;
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struct panfrost_ptr res_table =
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panvk_cmd_alloc_desc_array(cmdbuf, res_table_size, RESOURCE);
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if (!res_table.cpu)
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return VK_ERROR_OUT_OF_DEVICE_MEMORY;
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memset(res_table.cpu, 0, pan_size(RESOURCE) * res_table_size);
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pan_cast_and_pack(res_table.cpu, RESOURCE, cfg) {
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cfg.address = descs.gpu;
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@ -669,12 +675,12 @@ cmd_emit_dcd(struct panvk_cmd_buffer *cmdbuf, struct pan_fb_info *fbinfo,
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cfg.flags_0.clean_fragment_write = true;
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#if PAN_ARCH >= 12
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cfg.fragment_resources = res_table.gpu | 1;
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cfg.fragment_resources = res_table.gpu | res_table_size;
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cfg.fragment_shader = panvk_priv_mem_dev_addr(shader->spd);
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cfg.thread_storage = cmdbuf->state.gfx.tsd;
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#else
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cfg.maximum_z = 1.0;
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cfg.shader.resources = res_table.gpu | 1;
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cfg.shader.resources = res_table.gpu | res_table_size;
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cfg.shader.shader = panvk_priv_mem_dev_addr(shader->spd);
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cfg.shader.thread_storage = cmdbuf->state.gfx.tsd;
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#endif
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