mirror of
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freedreno/a6xx: Split descriptors out into their own file
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35899>
This commit is contained in:
Rob Clark
Marge Bot
parent
d099bbd64d
commit
eb3e0b7164
4 changed files with 201 additions and 188 deletions
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@ -13,6 +13,7 @@
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#include "a7xx_enums.xml.h"
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#include "a6xx_perfcntrs.xml.h"
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#include "a7xx_perfcntrs.xml.h"
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#include "a6xx_descriptors.xml.h"
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#include "a6xx.xml.h"
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#endif /* FD6_HW_H */
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@ -9,6 +9,7 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
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<import file="adreno/a7xx_enums.xml"/>
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<import file="adreno/a6xx_perfcntrs.xml"/>
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<import file="adreno/a7xx_perfcntrs.xml"/>
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<import file="adreno/a6xx_descriptors.xml"/>
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<!--
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Each register that is actually being used by driver should have "usage" defined,
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@ -3713,194 +3714,6 @@ by a particular renderpass/blit.
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</reg32>
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</domain>
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<domain name="A6XX_TEX_SAMP" width="32">
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<doc>Texture sampler dwords</doc>
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<enum name="a6xx_tex_filter"> <!-- same as a4xx? -->
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<value name="A6XX_TEX_NEAREST" value="0"/>
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<value name="A6XX_TEX_LINEAR" value="1"/>
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<value name="A6XX_TEX_ANISO" value="2"/>
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<value name="A6XX_TEX_CUBIC" value="3"/> <!-- a650 only -->
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</enum>
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<enum name="a6xx_tex_clamp"> <!-- same as a4xx? -->
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<value name="A6XX_TEX_REPEAT" value="0"/>
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<value name="A6XX_TEX_CLAMP_TO_EDGE" value="1"/>
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<value name="A6XX_TEX_MIRROR_REPEAT" value="2"/>
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<value name="A6XX_TEX_CLAMP_TO_BORDER" value="3"/>
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<value name="A6XX_TEX_MIRROR_CLAMP" value="4"/>
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</enum>
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<enum name="a6xx_tex_aniso"> <!-- same as a4xx? -->
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<value name="A6XX_TEX_ANISO_1" value="0"/>
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<value name="A6XX_TEX_ANISO_2" value="1"/>
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<value name="A6XX_TEX_ANISO_4" value="2"/>
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<value name="A6XX_TEX_ANISO_8" value="3"/>
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<value name="A6XX_TEX_ANISO_16" value="4"/>
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</enum>
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<enum name="a6xx_reduction_mode">
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<value name="A6XX_REDUCTION_MODE_AVERAGE" value="0"/>
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<value name="A6XX_REDUCTION_MODE_MIN" value="1"/>
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<value name="A6XX_REDUCTION_MODE_MAX" value="2"/>
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</enum>
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<enum name="a6xx_fast_border_color">
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<!-- R B G A -->
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<value name="A6XX_BORDER_COLOR_0_0_0_0" value="0"/>
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<value name="A6XX_BORDER_COLOR_0_0_0_1" value="1"/>
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<value name="A6XX_BORDER_COLOR_1_1_1_0" value="2"/>
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<value name="A6XX_BORDER_COLOR_1_1_1_1" value="3"/>
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</enum>
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<reg32 offset="0" name="0">
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<bitfield name="MIPFILTER_LINEAR_NEAR" pos="0" type="boolean"/>
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<bitfield name="XY_MAG" low="1" high="2" type="a6xx_tex_filter"/>
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<bitfield name="XY_MIN" low="3" high="4" type="a6xx_tex_filter"/>
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<bitfield name="WRAP_S" low="5" high="7" type="a6xx_tex_clamp"/>
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<bitfield name="WRAP_T" low="8" high="10" type="a6xx_tex_clamp"/>
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<bitfield name="WRAP_R" low="11" high="13" type="a6xx_tex_clamp"/>
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<bitfield name="ANISO" low="14" high="16" type="a6xx_tex_aniso"/>
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<bitfield name="LOD_BIAS" low="19" high="31" type="fixed" radix="8"/><!-- no idea how many bits for real -->
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</reg32>
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<reg32 offset="1" name="1">
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<bitfield name="CLAMPENABLE" pos="0" type="boolean">
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<doc>
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clamp result to [0, 1] if the format is unorm or
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[-1, 1] if the format is snorm, *after*
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filtering. Has no effect for other formats.
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</doc>
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</bitfield>
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<bitfield name="COMPARE_FUNC" low="1" high="3" type="adreno_compare_func"/>
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<bitfield name="CUBEMAPSEAMLESSFILTOFF" pos="4" type="boolean"/>
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<bitfield name="UNNORM_COORDS" pos="5" type="boolean"/>
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<bitfield name="MIPFILTER_LINEAR_FAR" pos="6" type="boolean"/>
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<bitfield name="MAX_LOD" low="8" high="19" type="ufixed" radix="8"/>
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<bitfield name="MIN_LOD" low="20" high="31" type="ufixed" radix="8"/>
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</reg32>
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<reg32 offset="2" name="2">
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<bitfield name="REDUCTION_MODE" low="0" high="1" type="a6xx_reduction_mode"/>
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<bitfield name="FASTBORDERCOLOR" low="2" high="3" type="a6xx_fast_border_color"/>
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<bitfield name="FASTBORDERCOLOREN" pos="4" type="boolean"/>
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<bitfield name="CHROMA_LINEAR" pos="5" type="boolean"/>
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<bitfield name="BCOLOR" low="7" high="31"/>
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</reg32>
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<reg32 offset="3" name="3"/>
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</domain>
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<domain name="A6XX_TEX_CONST" width="32" varset="chip">
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<doc>Texture constant dwords</doc>
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<enum name="a6xx_tex_swiz"> <!-- same as a4xx? -->
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<value name="A6XX_TEX_X" value="0"/>
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<value name="A6XX_TEX_Y" value="1"/>
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<value name="A6XX_TEX_Z" value="2"/>
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<value name="A6XX_TEX_W" value="3"/>
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<value name="A6XX_TEX_ZERO" value="4"/>
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<value name="A6XX_TEX_ONE" value="5"/>
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</enum>
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<reg32 offset="0" name="0">
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<bitfield name="TILE_MODE" low="0" high="1" type="a6xx_tile_mode"/>
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<bitfield name="SRGB" pos="2" type="boolean"/>
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<bitfield name="SWIZ_X" low="4" high="6" type="a6xx_tex_swiz"/>
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<bitfield name="SWIZ_Y" low="7" high="9" type="a6xx_tex_swiz"/>
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<bitfield name="SWIZ_Z" low="10" high="12" type="a6xx_tex_swiz"/>
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<bitfield name="SWIZ_W" low="13" high="15" type="a6xx_tex_swiz"/>
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<bitfield name="MIPLVLS" low="16" high="19" type="uint"/>
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<!-- overlaps with MIPLVLS -->
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<bitfield name="CHROMA_MIDPOINT_X" pos="16" type="boolean"/>
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<bitfield name="CHROMA_MIDPOINT_Y" pos="18" type="boolean"/>
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<bitfield name="SAMPLES" low="20" high="21" type="a3xx_msaa_samples"/>
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<bitfield name="FMT" low="22" high="29" type="a6xx_format"/>
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<!--
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Why is the swap needed in addition to SWIZ_*? The swap
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is performed before border color replacement, while the
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swizzle is applied after after it.
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-->
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<bitfield name="SWAP" low="30" high="31" type="a3xx_color_swap"/>
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</reg32>
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<reg32 offset="1" name="1">
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<bitfield name="WIDTH" low="0" high="14" type="uint"/>
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<bitfield name="HEIGHT" low="15" high="29" type="uint"/>
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<bitfield name="MUTABLEEN" pos="31" type="boolean" variants="A7XX-"/>
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</reg32>
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<reg32 offset="2" name="2">
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<!--
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These fields overlap PITCH, and are used instead of
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PITCH/PITCHALIGN when TYPE is A6XX_TEX_BUFFER.
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-->
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<doc> probably for D3D structured UAVs, normally set to 1 </doc>
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<bitfield name="STRUCTSIZETEXELS" low="4" high="15" type="uint"/>
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<bitfield name="STARTOFFSETTEXELS" low="16" high="21" type="uint"/>
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<!-- minimum pitch (for mipmap levels): log2(pitchalign / 64) -->
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<bitfield name="PITCHALIGN" low="0" high="3" type="uint"/>
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<doc>Pitch in bytes (so actually stride)</doc>
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<bitfield name="PITCH" low="7" high="28" type="uint"/>
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<bitfield name="TYPE" low="29" high="31" type="a6xx_tex_type"/>
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</reg32>
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<reg32 offset="3" name="3">
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<!--
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ARRAY_PITCH is basically LAYERSZ for the first mipmap level, and
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for 3d textures (laid out mipmap level first) MIN_LAYERSZ is the
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layer size at the point that it stops being reduced moving to
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higher (smaller) mipmap levels
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-->
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<bitfield name="ARRAY_PITCH" low="0" high="22" shr="12" type="uint"/>
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<bitfield name="MIN_LAYERSZ" low="23" high="26" shr="12"/>
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<!--
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by default levels with w < 16 are linear
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TILE_ALL makes all levels have tiling
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seems required when using UBWC, since all levels have UBWC (can possibly be disabled?)
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-->
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<bitfield name="TILE_ALL" pos="27" type="boolean"/>
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<bitfield name="FLAG" pos="28" type="boolean"/>
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</reg32>
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<!-- for 2-3 plane format, BASE is flag buffer address (if enabled)
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the address of the non-flag base buffer is determined automatically,
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and must follow the flag buffer
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-->
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<reg32 offset="4" name="4">
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<bitfield name="BASE_LO" low="5" high="31" shr="5"/>
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</reg32>
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<reg32 offset="5" name="5">
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<bitfield name="BASE_HI" low="0" high="16"/>
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<bitfield name="DEPTH" low="17" high="29" type="uint"/>
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</reg32>
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<reg32 offset="6" name="6">
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<!-- overlaps with PLANE_PITCH -->
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<bitfield name="MIN_LOD_CLAMP" low="0" high="11" type="ufixed" radix="8"/>
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<!-- pitch for plane 2 / plane 3 -->
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<bitfield name="PLANE_PITCH" low="8" high="31" type="uint"/>
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</reg32>
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<!-- 7/8 is plane 2 address for planar formats -->
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<reg32 offset="7" name="7">
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<bitfield name="FLAG_LO" low="5" high="31" shr="5"/>
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</reg32>
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<reg32 offset="8" name="8">
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<bitfield name="FLAG_HI" low="0" high="16"/>
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</reg32>
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<!-- 9/10 is plane 3 address for planar formats -->
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<reg32 offset="9" name="9">
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<bitfield name="FLAG_BUFFER_ARRAY_PITCH" low="0" high="16" shr="4" type="uint"/>
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</reg32>
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<reg32 offset="10" name="10">
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<bitfield name="FLAG_BUFFER_PITCH" low="0" high="6" shr="6" type="uint"/>
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<!-- log2 size of the first level, required for mipmapping -->
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<bitfield name="FLAG_BUFFER_LOGW" low="8" high="11" type="uint"/>
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<bitfield name="FLAG_BUFFER_LOGH" low="12" high="15" type="uint"/>
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</reg32>
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<reg32 offset="11" name="11"/>
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<reg32 offset="12" name="12"/>
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<reg32 offset="13" name="13"/>
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<reg32 offset="14" name="14"/>
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<reg32 offset="15" name="15"/>
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</domain>
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<domain name="A6XX_UBO" width="32">
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<reg32 offset="0" name="0">
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<bitfield name="BASE_LO" low="0" high="31"/>
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</reg32>
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<reg32 offset="1" name="1">
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<bitfield name="BASE_HI" low="0" high="16"/>
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<bitfield name="SIZE" low="17" high="31"/> <!-- size in vec4 (4xDWORD) units -->
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</reg32>
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</domain>
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<domain name="A6XX_PDC" width="32">
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<reg32 offset="0x1140" name="GPU_ENABLE_PDC"/>
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<reg32 offset="0x1148" name="GPU_SEQ_START_ADDR"/>
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198
src/freedreno/registers/adreno/a6xx_descriptors.xml
Normal file
198
src/freedreno/registers/adreno/a6xx_descriptors.xml
Normal file
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@ -0,0 +1,198 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<database xmlns="http://nouveau.freedesktop.org/"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
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<import file="freedreno_copyright.xml"/>
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<import file="adreno/adreno_common.xml"/>
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<import file="adreno/adreno_pm4.xml"/>
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<import file="adreno/a6xx_enums.xml"/>
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<domain name="A6XX_TEX_SAMP" width="32">
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<doc>Texture sampler dwords</doc>
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<enum name="a6xx_tex_filter"> <!-- same as a4xx? -->
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<value name="A6XX_TEX_NEAREST" value="0"/>
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<value name="A6XX_TEX_LINEAR" value="1"/>
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<value name="A6XX_TEX_ANISO" value="2"/>
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<value name="A6XX_TEX_CUBIC" value="3"/> <!-- a650 only -->
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</enum>
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<enum name="a6xx_tex_clamp"> <!-- same as a4xx? -->
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<value name="A6XX_TEX_REPEAT" value="0"/>
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<value name="A6XX_TEX_CLAMP_TO_EDGE" value="1"/>
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<value name="A6XX_TEX_MIRROR_REPEAT" value="2"/>
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<value name="A6XX_TEX_CLAMP_TO_BORDER" value="3"/>
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<value name="A6XX_TEX_MIRROR_CLAMP" value="4"/>
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</enum>
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<enum name="a6xx_tex_aniso"> <!-- same as a4xx? -->
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<value name="A6XX_TEX_ANISO_1" value="0"/>
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<value name="A6XX_TEX_ANISO_2" value="1"/>
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<value name="A6XX_TEX_ANISO_4" value="2"/>
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<value name="A6XX_TEX_ANISO_8" value="3"/>
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<value name="A6XX_TEX_ANISO_16" value="4"/>
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</enum>
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<enum name="a6xx_reduction_mode">
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<value name="A6XX_REDUCTION_MODE_AVERAGE" value="0"/>
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<value name="A6XX_REDUCTION_MODE_MIN" value="1"/>
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<value name="A6XX_REDUCTION_MODE_MAX" value="2"/>
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</enum>
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<enum name="a6xx_fast_border_color">
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<!-- R B G A -->
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<value name="A6XX_BORDER_COLOR_0_0_0_0" value="0"/>
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<value name="A6XX_BORDER_COLOR_0_0_0_1" value="1"/>
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<value name="A6XX_BORDER_COLOR_1_1_1_0" value="2"/>
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<value name="A6XX_BORDER_COLOR_1_1_1_1" value="3"/>
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</enum>
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<reg32 offset="0" name="0">
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<bitfield name="MIPFILTER_LINEAR_NEAR" pos="0" type="boolean"/>
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<bitfield name="XY_MAG" low="1" high="2" type="a6xx_tex_filter"/>
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<bitfield name="XY_MIN" low="3" high="4" type="a6xx_tex_filter"/>
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<bitfield name="WRAP_S" low="5" high="7" type="a6xx_tex_clamp"/>
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<bitfield name="WRAP_T" low="8" high="10" type="a6xx_tex_clamp"/>
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<bitfield name="WRAP_R" low="11" high="13" type="a6xx_tex_clamp"/>
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<bitfield name="ANISO" low="14" high="16" type="a6xx_tex_aniso"/>
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<bitfield name="LOD_BIAS" low="19" high="31" type="fixed" radix="8"/><!-- no idea how many bits for real -->
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</reg32>
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<reg32 offset="1" name="1">
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<bitfield name="CLAMPENABLE" pos="0" type="boolean">
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<doc>
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clamp result to [0, 1] if the format is unorm or
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[-1, 1] if the format is snorm, *after*
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filtering. Has no effect for other formats.
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</doc>
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</bitfield>
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<bitfield name="COMPARE_FUNC" low="1" high="3" type="adreno_compare_func"/>
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<bitfield name="CUBEMAPSEAMLESSFILTOFF" pos="4" type="boolean"/>
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<bitfield name="UNNORM_COORDS" pos="5" type="boolean"/>
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<bitfield name="MIPFILTER_LINEAR_FAR" pos="6" type="boolean"/>
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<bitfield name="MAX_LOD" low="8" high="19" type="ufixed" radix="8"/>
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<bitfield name="MIN_LOD" low="20" high="31" type="ufixed" radix="8"/>
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</reg32>
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<reg32 offset="2" name="2">
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<bitfield name="REDUCTION_MODE" low="0" high="1" type="a6xx_reduction_mode"/>
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<bitfield name="FASTBORDERCOLOR" low="2" high="3" type="a6xx_fast_border_color"/>
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<bitfield name="FASTBORDERCOLOREN" pos="4" type="boolean"/>
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<bitfield name="CHROMA_LINEAR" pos="5" type="boolean"/>
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<bitfield name="BCOLOR" low="7" high="31"/>
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</reg32>
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<reg32 offset="3" name="3"/>
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</domain>
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<domain name="A6XX_TEX_CONST" width="32" varset="chip">
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<doc>Texture constant dwords</doc>
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<enum name="a6xx_tex_swiz"> <!-- same as a4xx? -->
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<value name="A6XX_TEX_X" value="0"/>
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<value name="A6XX_TEX_Y" value="1"/>
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<value name="A6XX_TEX_Z" value="2"/>
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<value name="A6XX_TEX_W" value="3"/>
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<value name="A6XX_TEX_ZERO" value="4"/>
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<value name="A6XX_TEX_ONE" value="5"/>
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</enum>
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<reg32 offset="0" name="0">
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<bitfield name="TILE_MODE" low="0" high="1" type="a6xx_tile_mode"/>
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<bitfield name="SRGB" pos="2" type="boolean"/>
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<bitfield name="SWIZ_X" low="4" high="6" type="a6xx_tex_swiz"/>
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<bitfield name="SWIZ_Y" low="7" high="9" type="a6xx_tex_swiz"/>
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<bitfield name="SWIZ_Z" low="10" high="12" type="a6xx_tex_swiz"/>
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<bitfield name="SWIZ_W" low="13" high="15" type="a6xx_tex_swiz"/>
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<bitfield name="MIPLVLS" low="16" high="19" type="uint"/>
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<!-- overlaps with MIPLVLS -->
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<bitfield name="CHROMA_MIDPOINT_X" pos="16" type="boolean"/>
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<bitfield name="CHROMA_MIDPOINT_Y" pos="18" type="boolean"/>
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<bitfield name="SAMPLES" low="20" high="21" type="a3xx_msaa_samples"/>
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<bitfield name="FMT" low="22" high="29" type="a6xx_format"/>
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<!--
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Why is the swap needed in addition to SWIZ_*? The swap
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is performed before border color replacement, while the
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swizzle is applied after after it.
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-->
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<bitfield name="SWAP" low="30" high="31" type="a3xx_color_swap"/>
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</reg32>
|
||||
<reg32 offset="1" name="1">
|
||||
<bitfield name="WIDTH" low="0" high="14" type="uint"/>
|
||||
<bitfield name="HEIGHT" low="15" high="29" type="uint"/>
|
||||
<bitfield name="MUTABLEEN" pos="31" type="boolean" variants="A7XX-"/>
|
||||
</reg32>
|
||||
<reg32 offset="2" name="2">
|
||||
<!--
|
||||
These fields overlap PITCH, and are used instead of
|
||||
PITCH/PITCHALIGN when TYPE is A6XX_TEX_BUFFER.
|
||||
-->
|
||||
<doc> probably for D3D structured UAVs, normally set to 1 </doc>
|
||||
<bitfield name="STRUCTSIZETEXELS" low="4" high="15" type="uint"/>
|
||||
<bitfield name="STARTOFFSETTEXELS" low="16" high="21" type="uint"/>
|
||||
|
||||
<!-- minimum pitch (for mipmap levels): log2(pitchalign / 64) -->
|
||||
<bitfield name="PITCHALIGN" low="0" high="3" type="uint"/>
|
||||
<doc>Pitch in bytes (so actually stride)</doc>
|
||||
<bitfield name="PITCH" low="7" high="28" type="uint"/>
|
||||
<bitfield name="TYPE" low="29" high="31" type="a6xx_tex_type"/>
|
||||
</reg32>
|
||||
<reg32 offset="3" name="3">
|
||||
<!--
|
||||
ARRAY_PITCH is basically LAYERSZ for the first mipmap level, and
|
||||
for 3d textures (laid out mipmap level first) MIN_LAYERSZ is the
|
||||
layer size at the point that it stops being reduced moving to
|
||||
higher (smaller) mipmap levels
|
||||
-->
|
||||
<bitfield name="ARRAY_PITCH" low="0" high="22" shr="12" type="uint"/>
|
||||
<bitfield name="MIN_LAYERSZ" low="23" high="26" shr="12"/>
|
||||
<!--
|
||||
by default levels with w < 16 are linear
|
||||
TILE_ALL makes all levels have tiling
|
||||
seems required when using UBWC, since all levels have UBWC (can possibly be disabled?)
|
||||
-->
|
||||
<bitfield name="TILE_ALL" pos="27" type="boolean"/>
|
||||
<bitfield name="FLAG" pos="28" type="boolean"/>
|
||||
</reg32>
|
||||
<!-- for 2-3 plane format, BASE is flag buffer address (if enabled)
|
||||
the address of the non-flag base buffer is determined automatically,
|
||||
and must follow the flag buffer
|
||||
-->
|
||||
<reg32 offset="4" name="4">
|
||||
<bitfield name="BASE_LO" low="5" high="31" shr="5"/>
|
||||
</reg32>
|
||||
<reg32 offset="5" name="5">
|
||||
<bitfield name="BASE_HI" low="0" high="16"/>
|
||||
<bitfield name="DEPTH" low="17" high="29" type="uint"/>
|
||||
</reg32>
|
||||
<reg32 offset="6" name="6">
|
||||
<!-- overlaps with PLANE_PITCH -->
|
||||
<bitfield name="MIN_LOD_CLAMP" low="0" high="11" type="ufixed" radix="8"/>
|
||||
<!-- pitch for plane 2 / plane 3 -->
|
||||
<bitfield name="PLANE_PITCH" low="8" high="31" type="uint"/>
|
||||
</reg32>
|
||||
<!-- 7/8 is plane 2 address for planar formats -->
|
||||
<reg32 offset="7" name="7">
|
||||
<bitfield name="FLAG_LO" low="5" high="31" shr="5"/>
|
||||
</reg32>
|
||||
<reg32 offset="8" name="8">
|
||||
<bitfield name="FLAG_HI" low="0" high="16"/>
|
||||
</reg32>
|
||||
<!-- 9/10 is plane 3 address for planar formats -->
|
||||
<reg32 offset="9" name="9">
|
||||
<bitfield name="FLAG_BUFFER_ARRAY_PITCH" low="0" high="16" shr="4" type="uint"/>
|
||||
</reg32>
|
||||
<reg32 offset="10" name="10">
|
||||
<bitfield name="FLAG_BUFFER_PITCH" low="0" high="6" shr="6" type="uint"/>
|
||||
<!-- log2 size of the first level, required for mipmapping -->
|
||||
<bitfield name="FLAG_BUFFER_LOGW" low="8" high="11" type="uint"/>
|
||||
<bitfield name="FLAG_BUFFER_LOGH" low="12" high="15" type="uint"/>
|
||||
</reg32>
|
||||
<reg32 offset="11" name="11"/>
|
||||
<reg32 offset="12" name="12"/>
|
||||
<reg32 offset="13" name="13"/>
|
||||
<reg32 offset="14" name="14"/>
|
||||
<reg32 offset="15" name="15"/>
|
||||
</domain>
|
||||
|
||||
<domain name="A6XX_UBO" width="32">
|
||||
<reg32 offset="0" name="0">
|
||||
<bitfield name="BASE_LO" low="0" high="31"/>
|
||||
</reg32>
|
||||
<reg32 offset="1" name="1">
|
||||
<bitfield name="BASE_HI" low="0" high="16"/>
|
||||
<bitfield name="SIZE" low="17" high="31"/> <!-- size in vec4 (4xDWORD) units -->
|
||||
</reg32>
|
||||
</domain>
|
||||
|
||||
</database>
|
||||
|
|
@ -8,6 +8,7 @@ xml_reg_files = [
|
|||
'a5xx.xml',
|
||||
'a6xx.xml',
|
||||
'a6xx_enums.xml',
|
||||
'a6xx_descriptors.xml',
|
||||
'a6xx_perfcntrs.xml',
|
||||
'a7xx_enums.xml',
|
||||
'a7xx_perfcntrs.xml',
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue