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panfrost,panvk: Move postprocess near shader_compile
Ideally there should be only sysval lowering in the middle. Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com> Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com> Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com> Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40844>
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4 changed files with 26 additions and 26 deletions
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@ -105,7 +105,6 @@ GENX(pan_blend_get_shader_locked)(struct pan_blend_shader_cache *cache,
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struct pan_shader_info info;
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pan_preprocess_nir(nir, inputs.gpu_id);
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pan_postprocess_nir(nir, inputs.gpu_id);
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#if PAN_ARCH < 6
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enum pipe_format rt_formats[8] = {0};
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@ -115,6 +114,8 @@ GENX(pan_blend_get_shader_locked)(struct pan_blend_shader_cache *cache,
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pan_prod_id(cache->gpu_id) < 0x700);
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#endif
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pan_postprocess_nir(nir, inputs.gpu_id);
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struct util_dynarray binary;
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binary = UTIL_DYNARRAY_INIT;
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pan_shader_compile(nir, &inputs, &binary, &info);
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@ -112,7 +112,6 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
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if (mesa_shader_stage_is_compute(s->info.stage)) {
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pan_preprocess_nir(s, panfrost_device_gpu_id(dev));
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pan_nir_lower_texture_early(s, panfrost_device_gpu_id(dev));
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pan_postprocess_nir(s, panfrost_device_gpu_id(dev));
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}
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struct pan_compile_inputs inputs = {
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@ -132,7 +131,18 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
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}
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}
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out->binary = UTIL_DYNARRAY_INIT;
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/* nir_opt_varyings is replacing all flat highp types with float32, we need
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* to figure out the varying types ourselves */
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inputs.trust_varying_flat_highp_types = false;
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struct pan_varying_layout varyings_layout;
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/* TODO: wire up VS layout in FS when linked together */
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if (s->info.stage == MESA_SHADER_VERTEX) {
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pan_varying_collect_formats(&varyings_layout, s,
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inputs.gpu_id,
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inputs.trust_varying_flat_highp_types, false);
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pan_build_varying_layout_compact(&varyings_layout, s, inputs.gpu_id);
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inputs.varying_layout = &varyings_layout;
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}
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if (s->info.stage == MESA_SHADER_FRAGMENT) {
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if (key->fs.nr_cbufs_for_fragcolor) {
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@ -174,6 +184,12 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
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panfrost_device_gpu_prod_id(dev) < 0x700);
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}
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pan_postprocess_nir(s, panfrost_device_gpu_id(dev));
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/* Lower resource indices */
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NIR_PASS(_, s, panfrost_nir_lower_res_indices, &inputs);
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pan_nir_lower_texture_late(s, inputs.gpu_id);
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if (s->info.stage == MESA_SHADER_VERTEX) {
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NIR_PASS(_, s, nir_inline_sysval,
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nir_intrinsic_load_noperspective_varyings_pan,
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@ -197,29 +213,13 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
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inputs.pushable_ubos |= BITFIELD_BIT(PAN_UBO_SYSVALS);
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}
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/* Lower resource indices */
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NIR_PASS(_, s, panfrost_nir_lower_res_indices, &inputs);
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pan_nir_lower_texture_late(s, inputs.gpu_id);
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/* nir_opt_varyings is replacing all flat highp types with float32, we need
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* to figure out the varying types ourselves */
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inputs.trust_varying_flat_highp_types = false;
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struct pan_varying_layout varyings_layout;
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/* TODO: wire up VS layout in FS when linked together */
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if (s->info.stage == MESA_SHADER_VERTEX) {
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pan_varying_collect_formats(&varyings_layout, s,
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inputs.gpu_id,
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inputs.trust_varying_flat_highp_types, false);
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pan_build_varying_layout_compact(&varyings_layout, s, inputs.gpu_id);
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inputs.varying_layout = &varyings_layout;
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}
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if (dev->arch >= 9) {
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/* Always enable this for GL, it avoids crashes when using unbound
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* resources. */
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inputs.robust_descriptors = true;
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}
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out->binary = UTIL_DYNARRAY_INIT;
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screen->vtbl.compile_shader(s, &inputs, &out->binary, &out->info);
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/* Report stats only if we really got the shader compiled */
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@ -547,8 +547,6 @@ panfrost_create_shader_state(struct pipe_context *pctx,
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NIR_PASS(_, nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
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glsl_type_size, nir_lower_io_use_interpolated_input_intrinsics);
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pan_postprocess_nir(nir, panfrost_device_gpu_id(dev));
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if (nir->info.stage == MESA_SHADER_FRAGMENT)
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so->noperspective_varyings =
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pan_nir_collect_noperspective_varyings_fs(nir);
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@ -421,8 +421,6 @@ main(int argc, const char **argv)
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pan_preprocess_nir(s, inputs.gpu_id);
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pan_nir_lower_texture_early(s, inputs.gpu_id);
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pan_postprocess_nir(s, inputs.gpu_id);
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pan_nir_lower_texture_late(s, inputs.gpu_id);
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NIR_PASS(_, s, nir_opt_deref);
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NIR_PASS(_, s, nir_lower_vars_to_ssa);
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@ -431,6 +429,9 @@ main(int argc, const char **argv)
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nir_var_mem_shared | nir_var_mem_global,
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nir_address_format_62bit_generic);
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pan_postprocess_nir(s, inputs.gpu_id);
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pan_nir_lower_texture_late(s, inputs.gpu_id);
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NIR_PASS(_, s, nir_shader_intrinsics_pass, lower_sysvals,
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nir_metadata_control_flow, NULL);
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@ -968,8 +968,6 @@ panvk_compile_nir(struct panvk_device *dev, nir_shader *nir,
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/* We're going to modify this so make our own copy to be nicer to callers */
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struct pan_compile_inputs input = *compile_input;
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pan_postprocess_nir(nir, input.gpu_id);
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if (nir->info.stage == MESA_SHADER_VERTEX)
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NIR_PASS(_, nir, nir_shader_intrinsics_pass, panvk_lower_load_vs_input,
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nir_metadata_control_flow, NULL);
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@ -981,6 +979,8 @@ panvk_compile_nir(struct panvk_device *dev, nir_shader *nir,
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NIR_PASS(_, nir, pan_nir_lower_image_index, MAX_VS_ATTRIBS);
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NIR_PASS(_, nir, pan_nir_lower_texel_buffer_fetch_index, MAX_VS_ATTRIBS);
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}
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pan_postprocess_nir(nir, input.gpu_id);
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pan_nir_lower_texture_late(nir, input.gpu_id);
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if (noperspective_varyings && nir->info.stage == MESA_SHADER_VERTEX) {
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