panfrost,panvk: Move postprocess near shader_compile

Ideally there should be only sysval lowering in the middle.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40844>
This commit is contained in:
Lorenzo Rossi 2026-04-04 20:43:01 +02:00 committed by Marge Bot
parent 83fd45aa5a
commit eafc822dbd
4 changed files with 26 additions and 26 deletions

View file

@ -105,7 +105,6 @@ GENX(pan_blend_get_shader_locked)(struct pan_blend_shader_cache *cache,
struct pan_shader_info info;
pan_preprocess_nir(nir, inputs.gpu_id);
pan_postprocess_nir(nir, inputs.gpu_id);
#if PAN_ARCH < 6
enum pipe_format rt_formats[8] = {0};
@ -115,6 +114,8 @@ GENX(pan_blend_get_shader_locked)(struct pan_blend_shader_cache *cache,
pan_prod_id(cache->gpu_id) < 0x700);
#endif
pan_postprocess_nir(nir, inputs.gpu_id);
struct util_dynarray binary;
binary = UTIL_DYNARRAY_INIT;
pan_shader_compile(nir, &inputs, &binary, &info);

View file

@ -112,7 +112,6 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
if (mesa_shader_stage_is_compute(s->info.stage)) {
pan_preprocess_nir(s, panfrost_device_gpu_id(dev));
pan_nir_lower_texture_early(s, panfrost_device_gpu_id(dev));
pan_postprocess_nir(s, panfrost_device_gpu_id(dev));
}
struct pan_compile_inputs inputs = {
@ -132,7 +131,18 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
}
}
out->binary = UTIL_DYNARRAY_INIT;
/* nir_opt_varyings is replacing all flat highp types with float32, we need
* to figure out the varying types ourselves */
inputs.trust_varying_flat_highp_types = false;
struct pan_varying_layout varyings_layout;
/* TODO: wire up VS layout in FS when linked together */
if (s->info.stage == MESA_SHADER_VERTEX) {
pan_varying_collect_formats(&varyings_layout, s,
inputs.gpu_id,
inputs.trust_varying_flat_highp_types, false);
pan_build_varying_layout_compact(&varyings_layout, s, inputs.gpu_id);
inputs.varying_layout = &varyings_layout;
}
if (s->info.stage == MESA_SHADER_FRAGMENT) {
if (key->fs.nr_cbufs_for_fragcolor) {
@ -174,6 +184,12 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
panfrost_device_gpu_prod_id(dev) < 0x700);
}
pan_postprocess_nir(s, panfrost_device_gpu_id(dev));
/* Lower resource indices */
NIR_PASS(_, s, panfrost_nir_lower_res_indices, &inputs);
pan_nir_lower_texture_late(s, inputs.gpu_id);
if (s->info.stage == MESA_SHADER_VERTEX) {
NIR_PASS(_, s, nir_inline_sysval,
nir_intrinsic_load_noperspective_varyings_pan,
@ -197,29 +213,13 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
inputs.pushable_ubos |= BITFIELD_BIT(PAN_UBO_SYSVALS);
}
/* Lower resource indices */
NIR_PASS(_, s, panfrost_nir_lower_res_indices, &inputs);
pan_nir_lower_texture_late(s, inputs.gpu_id);
/* nir_opt_varyings is replacing all flat highp types with float32, we need
* to figure out the varying types ourselves */
inputs.trust_varying_flat_highp_types = false;
struct pan_varying_layout varyings_layout;
/* TODO: wire up VS layout in FS when linked together */
if (s->info.stage == MESA_SHADER_VERTEX) {
pan_varying_collect_formats(&varyings_layout, s,
inputs.gpu_id,
inputs.trust_varying_flat_highp_types, false);
pan_build_varying_layout_compact(&varyings_layout, s, inputs.gpu_id);
inputs.varying_layout = &varyings_layout;
}
if (dev->arch >= 9) {
/* Always enable this for GL, it avoids crashes when using unbound
* resources. */
inputs.robust_descriptors = true;
}
out->binary = UTIL_DYNARRAY_INIT;
screen->vtbl.compile_shader(s, &inputs, &out->binary, &out->info);
/* Report stats only if we really got the shader compiled */
@ -547,8 +547,6 @@ panfrost_create_shader_state(struct pipe_context *pctx,
NIR_PASS(_, nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
glsl_type_size, nir_lower_io_use_interpolated_input_intrinsics);
pan_postprocess_nir(nir, panfrost_device_gpu_id(dev));
if (nir->info.stage == MESA_SHADER_FRAGMENT)
so->noperspective_varyings =
pan_nir_collect_noperspective_varyings_fs(nir);

View file

@ -421,8 +421,6 @@ main(int argc, const char **argv)
pan_preprocess_nir(s, inputs.gpu_id);
pan_nir_lower_texture_early(s, inputs.gpu_id);
pan_postprocess_nir(s, inputs.gpu_id);
pan_nir_lower_texture_late(s, inputs.gpu_id);
NIR_PASS(_, s, nir_opt_deref);
NIR_PASS(_, s, nir_lower_vars_to_ssa);
@ -431,6 +429,9 @@ main(int argc, const char **argv)
nir_var_mem_shared | nir_var_mem_global,
nir_address_format_62bit_generic);
pan_postprocess_nir(s, inputs.gpu_id);
pan_nir_lower_texture_late(s, inputs.gpu_id);
NIR_PASS(_, s, nir_shader_intrinsics_pass, lower_sysvals,
nir_metadata_control_flow, NULL);

View file

@ -968,8 +968,6 @@ panvk_compile_nir(struct panvk_device *dev, nir_shader *nir,
/* We're going to modify this so make our own copy to be nicer to callers */
struct pan_compile_inputs input = *compile_input;
pan_postprocess_nir(nir, input.gpu_id);
if (nir->info.stage == MESA_SHADER_VERTEX)
NIR_PASS(_, nir, nir_shader_intrinsics_pass, panvk_lower_load_vs_input,
nir_metadata_control_flow, NULL);
@ -981,6 +979,8 @@ panvk_compile_nir(struct panvk_device *dev, nir_shader *nir,
NIR_PASS(_, nir, pan_nir_lower_image_index, MAX_VS_ATTRIBS);
NIR_PASS(_, nir, pan_nir_lower_texel_buffer_fetch_index, MAX_VS_ATTRIBS);
}
pan_postprocess_nir(nir, input.gpu_id);
pan_nir_lower_texture_late(nir, input.gpu_id);
if (noperspective_varyings && nir->info.stage == MESA_SHADER_VERTEX) {