mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-01-01 01:00:10 +01:00
svgadump: Several improvements to shader dumping.
This commit is contained in:
José Fonseca
parent
d0ec18e111
commit
ea8f7bd2e4
4 changed files with 411 additions and 336 deletions
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@ -98,21 +98,33 @@ struct sh_defi
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#define PS_TEXTURETYPE_CUBE SVGA3DSAMP_CUBE
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#define PS_TEXTURETYPE_VOLUME SVGA3DSAMP_VOLUME
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struct ps_sampleinfo
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struct sh_sampleinfo
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{
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unsigned unused:27;
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unsigned texture_type:4;
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unsigned is_reg:1;
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};
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struct vs_semantic
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struct sh_semantic
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{
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unsigned usage:5;
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unsigned unused1:11;
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unsigned usage:4;
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unsigned unused1:12;
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unsigned usage_index:4;
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unsigned unused2:12;
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unsigned unused2:11;
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unsigned is_reg:1;
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};
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#define SH_WRITEMASK_0 0x1
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#define SH_WRITEMASK_1 0x2
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#define SH_WRITEMASK_2 0x4
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#define SH_WRITEMASK_3 0x8
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#define SH_WRITEMASK_ALL 0xf
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#define SH_DSTMOD_NONE 0x0
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#define SH_DSTMOD_SATURATE 0x1
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#define SH_DSTMOD_PARTIALPRECISION 0x2
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#define SH_DSTMOD_MSAMPCENTROID 0x4
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struct sh_dstreg
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{
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unsigned number:11;
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@ -136,17 +148,12 @@ struct sh_dcl
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{
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struct sh_op op;
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union {
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struct {
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struct ps_sampleinfo sampleinfo;
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} ps;
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struct {
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struct vs_semantic semantic;
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} vs;
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struct sh_sampleinfo sampleinfo;
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struct sh_semantic semantic;
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} u;
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struct sh_dstreg reg;
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};
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struct sh_srcreg
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{
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unsigned number:11;
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@ -40,102 +40,139 @@
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struct dump_info
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{
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SVGA3dShaderVersion version;
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uint32 version;
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boolean is_ps;
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int indent;
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};
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#define DUMP_MAX_OP_SRC 4
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struct dump_op
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{
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struct sh_op op;
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struct sh_dstreg dst;
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struct sh_srcreg dstind;
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struct sh_srcreg src[DUMP_MAX_OP_SRC];
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struct sh_srcreg srcind[DUMP_MAX_OP_SRC];
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struct sh_srcreg p0;
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};
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static void
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dump_indent(int indent)
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{
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int i;
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for (i = 0; i < indent; ++i) {
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_debug_printf(" ");
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}
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}
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static void dump_op( struct sh_op op, const char *mnemonic )
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{
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assert( op.predicated == 0 );
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assert( op.is_reg == 0 );
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if (op.predicated) {
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_debug_printf("(p0) ");
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}
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if (op.coissue)
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_debug_printf( "+" );
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_debug_printf( "%s", mnemonic );
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switch (op.control) {
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case 0:
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switch (op.opcode) {
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case SVGA3DOP_TEX:
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switch (op.control) {
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case 0:
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break;
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case 1 /* PROJECT */:
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_debug_printf("p");
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break;
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case 2 /* BIAS */:
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_debug_printf("b");
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break;
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default:
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assert(0);
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}
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break;
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case SVGA3DOPCONT_PROJECT:
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_debug_printf( "p" );
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break;
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case SVGA3DOPCONT_BIAS:
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_debug_printf( "b" );
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case SVGA3DOP_IFC:
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case SVGA3DOP_BREAKC:
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case SVGA3DOP_SETP:
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switch (op.control) {
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case SVGA3DOPCOMP_GT:
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_debug_printf("_gt");
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break;
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case SVGA3DOPCOMP_EQ:
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_debug_printf("_eq");
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break;
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case SVGA3DOPCOMP_GE:
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_debug_printf("_ge");
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break;
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case SVGA3DOPCOMP_LT:
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_debug_printf("_lt");
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break;
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case SVGA3DOPCOMPC_NE:
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_debug_printf("_ne");
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break;
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case SVGA3DOPCOMP_LE:
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_debug_printf("_le");
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break;
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default:
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assert(0);
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}
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break;
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default:
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assert( 0 );
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assert(op.control == 0);
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}
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}
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static void dump_comp_op( struct sh_op op, const char *mnemonic )
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static void
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format_reg(const char *name,
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const struct sh_reg reg,
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const struct sh_srcreg *indreg)
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{
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assert( op.is_reg == 0 );
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if (reg.relative) {
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assert(indreg);
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if (op.coissue)
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_debug_printf( "+" );
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_debug_printf( "%s", mnemonic );
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switch (op.control) {
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case SVGA3DOPCOMP_RESERVED0:
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break;
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case SVGA3DOPCOMP_GT:
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_debug_printf("_gt");
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break;
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case SVGA3DOPCOMP_EQ:
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_debug_printf("_eq");
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break;
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case SVGA3DOPCOMP_GE:
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_debug_printf("_ge");
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break;
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case SVGA3DOPCOMP_LT:
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_debug_printf("_lt");
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break;
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case SVGA3DOPCOMPC_NE:
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_debug_printf("_ne");
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break;
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case SVGA3DOPCOMP_LE:
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_debug_printf("_le");
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break;
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case SVGA3DOPCOMP_RESERVED1:
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default:
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assert( 0 );
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if (sh_srcreg_type(*indreg) == SVGA3DREG_LOOP) {
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_debug_printf("%s[aL+%u]", name, reg.number);
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} else {
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_debug_printf("%s[a%u.x+%u]", name, indreg->number, reg.number);
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}
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} else {
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_debug_printf("%s%u", name, reg.number);
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}
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}
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static void dump_reg( struct sh_reg reg, struct sh_srcreg *indreg, const struct dump_info *di )
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{
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assert( sh_reg_type( reg ) == SVGA3DREG_CONST || reg.relative == 0 );
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assert( reg.is_reg == 1 );
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switch (sh_reg_type( reg )) {
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case SVGA3DREG_TEMP:
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_debug_printf( "r%u", reg.number );
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format_reg("r", reg, NULL);
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break;
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case SVGA3DREG_INPUT:
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_debug_printf( "v%u", reg.number );
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format_reg("v", reg, indreg);
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break;
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case SVGA3DREG_CONST:
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if (reg.relative) {
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if (sh_srcreg_type( *indreg ) == SVGA3DREG_LOOP)
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_debug_printf( "c[aL+%u]", reg.number );
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else
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_debug_printf( "c[a%u.x+%u]", indreg->number, reg.number );
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}
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else
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_debug_printf( "c%u", reg.number );
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format_reg("c", reg, indreg);
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break;
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case SVGA3DREG_ADDR: /* VS */
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/* SVGA3DREG_TEXTURE */ /* PS */
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if (di->is_ps)
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_debug_printf( "t%u", reg.number );
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else
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_debug_printf( "a%u", reg.number );
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assert(!reg.relative);
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if (di->is_ps) {
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format_reg("t", reg, NULL);
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} else {
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format_reg("a", reg, NULL);
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}
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break;
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case SVGA3DREG_RASTOUT:
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assert(!reg.relative);
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switch (reg.number) {
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case 0 /*POSITION*/:
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_debug_printf( "oPos" );
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@ -154,64 +191,69 @@ static void dump_reg( struct sh_reg reg, struct sh_srcreg *indreg, const struct
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case SVGA3DREG_ATTROUT:
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assert( reg.number < 2 );
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_debug_printf( "oD%u", reg.number );
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format_reg("oD", reg, NULL);
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break;
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case SVGA3DREG_TEXCRDOUT:
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/* SVGA3DREG_OUTPUT */
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_debug_printf( "oT%u", reg.number );
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case SVGA3DREG_TEXCRDOUT: /* VS */
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/* SVGA3DREG_OUTPUT */ /* VS3.0+ */
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if (!di->is_ps && di->version >= SVGA3D_VS_30) {
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format_reg("o", reg, indreg);
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} else {
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format_reg("oT", reg, NULL);
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}
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break;
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case SVGA3DREG_COLOROUT:
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_debug_printf( "oC%u", reg.number );
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format_reg("oC", reg, NULL);
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break;
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case SVGA3DREG_DEPTHOUT:
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_debug_printf( "oD%u", reg.number );
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assert(!reg.relative);
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assert(reg.number == 0);
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_debug_printf("oDepth");
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break;
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case SVGA3DREG_SAMPLER:
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_debug_printf( "s%u", reg.number );
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format_reg("s", reg, NULL);
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break;
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case SVGA3DREG_CONSTBOOL:
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assert( !reg.relative );
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_debug_printf( "b%u", reg.number );
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format_reg("b", reg, NULL);
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break;
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case SVGA3DREG_CONSTINT:
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assert( !reg.relative );
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_debug_printf( "i%u", reg.number );
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format_reg("i", reg, NULL);
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break;
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case SVGA3DREG_LOOP:
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assert(!reg.relative);
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assert( reg.number == 0 );
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_debug_printf( "aL" );
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break;
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case SVGA3DREG_MISCTYPE:
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assert(!reg.relative);
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switch (reg.number) {
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case SVGA3DMISCREG_POSITION:
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_debug_printf( "vPos" );
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_debug_printf("vPos");
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break;
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case SVGA3DMISCREG_FACE:
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_debug_printf( "vFace" );
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_debug_printf("vFace");
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break;
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default:
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assert(0);
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break;
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_debug_printf("???");
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}
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break;
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case SVGA3DREG_LABEL:
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_debug_printf( "l%u", reg.number );
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format_reg("l", reg, NULL);
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break;
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case SVGA3DREG_PREDICATE:
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_debug_printf( "p%u", reg.number );
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format_reg("p", reg, NULL);
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break;
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default:
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assert( 0 );
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_debug_printf( "???" );
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@ -233,8 +275,11 @@ static void dump_bdata( boolean bdata )
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_debug_printf( bdata ? "TRUE" : "FALSE" );
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}
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static void dump_sampleinfo( struct ps_sampleinfo sampleinfo )
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static void
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dump_sampleinfo(struct sh_sampleinfo sampleinfo)
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{
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assert( sampleinfo.is_reg == 1 );
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switch (sampleinfo.texture_type) {
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case SVGA3DSAMP_2D:
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_debug_printf( "_2d" );
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@ -250,63 +295,67 @@ static void dump_sampleinfo( struct ps_sampleinfo sampleinfo )
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}
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}
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static void dump_usageinfo( struct vs_semantic semantic )
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static void
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dump_semantic(uint usage,
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uint usage_index)
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{
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switch (semantic.usage) {
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switch (usage) {
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case SVGA3D_DECLUSAGE_POSITION:
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_debug_printf("_position" );
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_debug_printf("_position");
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break;
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case SVGA3D_DECLUSAGE_BLENDWEIGHT:
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_debug_printf("_blendweight" );
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_debug_printf("_blendweight");
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break;
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case SVGA3D_DECLUSAGE_BLENDINDICES:
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_debug_printf("_blendindices" );
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_debug_printf("_blendindices");
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break;
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case SVGA3D_DECLUSAGE_NORMAL:
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_debug_printf("_normal" );
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_debug_printf("_normal");
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break;
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case SVGA3D_DECLUSAGE_PSIZE:
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_debug_printf("_psize" );
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_debug_printf("_psize");
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break;
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case SVGA3D_DECLUSAGE_TEXCOORD:
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_debug_printf("_texcoord");
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break;
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case SVGA3D_DECLUSAGE_TANGENT:
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_debug_printf("_tangent" );
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_debug_printf("_tangent");
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break;
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case SVGA3D_DECLUSAGE_BINORMAL:
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_debug_printf("_binormal" );
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_debug_printf("_binormal");
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break;
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case SVGA3D_DECLUSAGE_TESSFACTOR:
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_debug_printf("_tessfactor" );
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_debug_printf("_tessfactor");
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break;
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case SVGA3D_DECLUSAGE_POSITIONT:
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_debug_printf("_positiont" );
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_debug_printf("_positiont");
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break;
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case SVGA3D_DECLUSAGE_COLOR:
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_debug_printf("_color" );
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_debug_printf("_color");
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break;
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case SVGA3D_DECLUSAGE_FOG:
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_debug_printf("_fog" );
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_debug_printf("_fog");
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break;
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case SVGA3D_DECLUSAGE_DEPTH:
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_debug_printf("_depth" );
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_debug_printf("_depth");
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break;
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case SVGA3D_DECLUSAGE_SAMPLE:
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_debug_printf("_sample");
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break;
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default:
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assert( 0 );
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return;
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assert(!"Unknown usage");
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_debug_printf("_???");
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}
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if (semantic.usage_index != 0) {
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_debug_printf("%d", semantic.usage_index );
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if (usage_index) {
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_debug_printf("%u", usage_index);
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}
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}
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static void dump_dstreg( struct sh_dstreg dstreg, const struct dump_info *di )
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static void
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dump_dstreg(struct sh_dstreg dstreg,
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struct sh_srcreg *indreg,
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const struct dump_info *di)
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{
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union {
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struct sh_reg reg;
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@ -346,7 +395,7 @@ static void dump_dstreg( struct sh_dstreg dstreg, const struct dump_info *di )
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_debug_printf( " " );
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u.dstreg = dstreg;
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dump_reg( u.reg, NULL, di );
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dump_reg( u.reg, indreg, di);
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if (dstreg.write_mask != SVGA3DWRITEMASK_ALL) {
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_debug_printf( "." );
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if (dstreg.write_mask & SVGA3DWRITEMASK_0)
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@ -362,23 +411,13 @@ static void dump_dstreg( struct sh_dstreg dstreg, const struct dump_info *di )
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static void dump_srcreg( struct sh_srcreg srcreg, struct sh_srcreg *indreg, const struct dump_info *di )
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{
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union {
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struct sh_reg reg;
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struct sh_srcreg srcreg;
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} u;
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switch (srcreg.modifier) {
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case SVGA3DSRCMOD_NEG:
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case SVGA3DSRCMOD_BIASNEG:
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case SVGA3DSRCMOD_SIGNNEG:
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case SVGA3DSRCMOD_X2NEG:
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_debug_printf( "-" );
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break;
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case SVGA3DSRCMOD_ABS:
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_debug_printf( "|" );
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break;
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case SVGA3DSRCMOD_ABSNEG:
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_debug_printf( "-|" );
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_debug_printf( "-" );
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break;
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case SVGA3DSRCMOD_COMP:
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_debug_printf( "1-" );
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@ -386,19 +425,13 @@ static void dump_srcreg( struct sh_srcreg srcreg, struct sh_srcreg *indreg, cons
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case SVGA3DSRCMOD_NOT:
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_debug_printf( "!" );
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}
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u.srcreg = srcreg;
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dump_reg( u.reg, indreg, di );
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dump_reg( *(struct sh_reg *) &srcreg, indreg, di );
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switch (srcreg.modifier) {
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case SVGA3DSRCMOD_NONE:
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case SVGA3DSRCMOD_NEG:
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case SVGA3DSRCMOD_COMP:
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case SVGA3DSRCMOD_NOT:
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break;
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case SVGA3DSRCMOD_ABS:
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case SVGA3DSRCMOD_ABSNEG:
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_debug_printf( "|" );
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break;
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case SVGA3DSRCMOD_BIAS:
|
||||
case SVGA3DSRCMOD_BIASNEG:
|
||||
_debug_printf( "_bias" );
|
||||
|
|
@ -417,6 +450,10 @@ static void dump_srcreg( struct sh_srcreg srcreg, struct sh_srcreg *indreg, cons
|
|||
case SVGA3DSRCMOD_DW:
|
||||
_debug_printf( "_dw" );
|
||||
break;
|
||||
case SVGA3DSRCMOD_ABS:
|
||||
case SVGA3DSRCMOD_ABSNEG:
|
||||
_debug_printf("_abs");
|
||||
break;
|
||||
default:
|
||||
assert( 0 );
|
||||
}
|
||||
|
|
@ -434,58 +471,132 @@ static void dump_srcreg( struct sh_srcreg srcreg, struct sh_srcreg *indreg, cons
|
|||
}
|
||||
}
|
||||
|
||||
static void
|
||||
parse_op(struct dump_info *di,
|
||||
const uint **token,
|
||||
struct dump_op *op,
|
||||
uint num_dst,
|
||||
uint num_src)
|
||||
{
|
||||
uint i;
|
||||
|
||||
assert(num_dst <= 1);
|
||||
assert(num_src <= DUMP_MAX_OP_SRC);
|
||||
|
||||
op->op = *(struct sh_op *)*token;
|
||||
*token += sizeof(struct sh_op) / sizeof(uint);
|
||||
|
||||
if (num_dst >= 1) {
|
||||
op->dst = *(struct sh_dstreg *)*token;
|
||||
*token += sizeof(struct sh_dstreg) / sizeof(uint);
|
||||
if (op->dst.relative &&
|
||||
(!di->is_ps && di->version >= SVGA3D_VS_30)) {
|
||||
op->dstind = *(struct sh_srcreg *)*token;
|
||||
*token += sizeof(struct sh_srcreg) / sizeof(uint);
|
||||
}
|
||||
}
|
||||
|
||||
if (op->op.predicated) {
|
||||
op->p0 = *(struct sh_srcreg *)*token;
|
||||
*token += sizeof(struct sh_srcreg) / sizeof(uint);
|
||||
}
|
||||
|
||||
for (i = 0; i < num_src; ++i) {
|
||||
op->src[i] = *(struct sh_srcreg *)*token;
|
||||
*token += sizeof(struct sh_srcreg) / sizeof(uint);
|
||||
if (op->src[i].relative &&
|
||||
((!di->is_ps && di->version >= SVGA3D_VS_20) ||
|
||||
(di->is_ps && di->version >= SVGA3D_PS_30))) {
|
||||
op->srcind[i] = *(struct sh_srcreg *)*token;
|
||||
*token += sizeof(struct sh_srcreg) / sizeof(uint);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
dump_inst(struct dump_info *di,
|
||||
const unsigned **assem,
|
||||
struct sh_op op,
|
||||
const struct sh_opcode_info *info)
|
||||
{
|
||||
struct dump_op dop;
|
||||
boolean not_first_arg = FALSE;
|
||||
uint i;
|
||||
|
||||
assert(info->num_dst <= 1);
|
||||
|
||||
di->indent -= info->pre_dedent;
|
||||
dump_indent(di->indent);
|
||||
di->indent += info->post_indent;
|
||||
|
||||
dump_op(op, info->mnemonic);
|
||||
|
||||
parse_op(di, assem, &dop, info->num_dst, info->num_src);
|
||||
if (info->num_dst > 0) {
|
||||
dump_dstreg(dop.dst, &dop.dstind, di);
|
||||
not_first_arg = TRUE;
|
||||
}
|
||||
|
||||
for (i = 0; i < info->num_src; i++) {
|
||||
if (not_first_arg) {
|
||||
_debug_printf(", ");
|
||||
} else {
|
||||
_debug_printf(" ");
|
||||
}
|
||||
dump_srcreg(dop.src[i], &dop.srcind[i], di);
|
||||
not_first_arg = TRUE;
|
||||
}
|
||||
|
||||
_debug_printf("\n");
|
||||
}
|
||||
|
||||
void
|
||||
svga_shader_dump(
|
||||
const unsigned *assem,
|
||||
unsigned dwords,
|
||||
unsigned do_binary )
|
||||
{
|
||||
const unsigned *start = assem;
|
||||
boolean finished = FALSE;
|
||||
struct dump_info di;
|
||||
unsigned i;
|
||||
|
||||
if (do_binary) {
|
||||
for (i = 0; i < dwords; i++)
|
||||
_debug_printf(" 0x%08x,\n", assem[i]);
|
||||
|
||||
_debug_printf("\n\n");
|
||||
}
|
||||
|
||||
di.version.value = *assem++;
|
||||
di.is_ps = (di.version.type == SVGA3D_PS_TYPE);
|
||||
di.version = *assem++;
|
||||
di.is_ps = (di.version & 0xFFFF0000) == 0xFFFF0000;
|
||||
di.indent = 0;
|
||||
|
||||
_debug_printf(
|
||||
"%s_%u_%u\n",
|
||||
di.is_ps ? "ps" : "vs",
|
||||
di.version.major,
|
||||
di.version.minor );
|
||||
(di.version >> 8) & 0xff,
|
||||
di.version & 0xff );
|
||||
|
||||
while (!finished) {
|
||||
struct sh_op op = *(struct sh_op *) assem;
|
||||
|
||||
if (assem - start >= dwords) {
|
||||
_debug_printf("... ran off end of buffer\n");
|
||||
assert(0);
|
||||
return;
|
||||
}
|
||||
|
||||
switch (op.opcode) {
|
||||
case SVGA3DOP_DCL:
|
||||
{
|
||||
struct sh_dcl dcl = *(struct sh_dcl *) assem;
|
||||
|
||||
_debug_printf( "dcl" );
|
||||
if (sh_dstreg_type( dcl.reg ) == SVGA3DREG_SAMPLER)
|
||||
dump_sampleinfo( dcl.u.ps.sampleinfo );
|
||||
else if (di.is_ps) {
|
||||
if (di.version.major == 3 &&
|
||||
sh_dstreg_type( dcl.reg ) != SVGA3DREG_MISCTYPE)
|
||||
dump_usageinfo( dcl.u.vs.semantic );
|
||||
switch (sh_dstreg_type(dcl.reg)) {
|
||||
case SVGA3DREG_INPUT:
|
||||
if ((di.is_ps && di.version >= SVGA3D_PS_30) ||
|
||||
(!di.is_ps && di.version >= SVGA3D_VS_30)) {
|
||||
dump_semantic(dcl.u.semantic.usage,
|
||||
dcl.u.semantic.usage_index);
|
||||
}
|
||||
break;
|
||||
case SVGA3DREG_TEXCRDOUT:
|
||||
if (!di.is_ps && di.version >= SVGA3D_VS_30) {
|
||||
dump_semantic(dcl.u.semantic.usage,
|
||||
dcl.u.semantic.usage_index);
|
||||
}
|
||||
break;
|
||||
case SVGA3DREG_SAMPLER:
|
||||
dump_sampleinfo( dcl.u.sampleinfo );
|
||||
break;
|
||||
}
|
||||
else
|
||||
dump_usageinfo( dcl.u.vs.semantic );
|
||||
dump_dstreg( dcl.reg, &di );
|
||||
dump_dstreg(dcl.reg, NULL, &di);
|
||||
_debug_printf( "\n" );
|
||||
assem += sizeof( struct sh_dcl ) / sizeof( unsigned );
|
||||
}
|
||||
|
|
@ -518,54 +629,38 @@ svga_shader_dump(
|
|||
break;
|
||||
|
||||
case SVGA3DOP_TEXCOORD:
|
||||
assert( di.is_ps );
|
||||
dump_op( op, "texcoord" );
|
||||
if (0) {
|
||||
struct sh_dstop dstop = *(struct sh_dstop *) assem;
|
||||
dump_dstreg( dstop.dst, &di );
|
||||
assem += sizeof( struct sh_dstop ) / sizeof( unsigned );
|
||||
{
|
||||
struct sh_opcode_info info = *svga_opcode_info(op.opcode);
|
||||
|
||||
assert(di.is_ps);
|
||||
if (di.version > SVGA3D_PS_13) {
|
||||
assert(info.num_src == 0);
|
||||
|
||||
info.num_src = 1;
|
||||
}
|
||||
|
||||
dump_inst(&di, &assem, op, &info);
|
||||
}
|
||||
else {
|
||||
struct sh_unaryop unaryop = *(struct sh_unaryop *) assem;
|
||||
dump_dstreg( unaryop.dst, &di );
|
||||
_debug_printf( ", " );
|
||||
dump_srcreg( unaryop.src, NULL, &di );
|
||||
assem += sizeof( struct sh_unaryop ) / sizeof( unsigned );
|
||||
}
|
||||
_debug_printf( "\n" );
|
||||
break;
|
||||
|
||||
case SVGA3DOP_TEX:
|
||||
assert( di.is_ps );
|
||||
if (0) {
|
||||
dump_op( op, "tex" );
|
||||
if (0) {
|
||||
struct sh_dstop dstop = *(struct sh_dstop *) assem;
|
||||
{
|
||||
struct sh_opcode_info info = *svga_opcode_info(op.opcode);
|
||||
|
||||
dump_dstreg( dstop.dst, &di );
|
||||
assem += sizeof( struct sh_dstop ) / sizeof( unsigned );
|
||||
assert(di.is_ps);
|
||||
if (di.version > SVGA3D_PS_13) {
|
||||
assert(info.num_src == 0);
|
||||
|
||||
if (di.version > SVGA3D_PS_14) {
|
||||
info.num_src = 2;
|
||||
info.mnemonic = "texld";
|
||||
} else {
|
||||
info.num_src = 1;
|
||||
}
|
||||
}
|
||||
else {
|
||||
struct sh_unaryop unaryop = *(struct sh_unaryop *) assem;
|
||||
|
||||
dump_dstreg( unaryop.dst, &di );
|
||||
_debug_printf( ", " );
|
||||
dump_srcreg( unaryop.src, NULL, &di );
|
||||
assem += sizeof( struct sh_unaryop ) / sizeof( unsigned );
|
||||
}
|
||||
dump_inst(&di, &assem, op, &info);
|
||||
}
|
||||
else {
|
||||
struct sh_binaryop binaryop = *(struct sh_binaryop *) assem;
|
||||
|
||||
dump_op( op, "texld" );
|
||||
dump_dstreg( binaryop.dst, &di );
|
||||
_debug_printf( ", " );
|
||||
dump_srcreg( binaryop.src0, NULL, &di );
|
||||
_debug_printf( ", " );
|
||||
dump_srcreg( binaryop.src1, NULL, &di );
|
||||
assem += sizeof( struct sh_binaryop ) / sizeof( unsigned );
|
||||
}
|
||||
_debug_printf( "\n" );
|
||||
break;
|
||||
|
||||
case SVGA3DOP_DEF:
|
||||
|
|
@ -581,6 +676,21 @@ svga_shader_dump(
|
|||
}
|
||||
break;
|
||||
|
||||
case SVGA3DOP_SINCOS:
|
||||
{
|
||||
struct sh_opcode_info info = *svga_opcode_info(op.opcode);
|
||||
|
||||
if ((di.is_ps && di.version >= SVGA3D_PS_30) ||
|
||||
(!di.is_ps && di.version >= SVGA3D_VS_30)) {
|
||||
assert(info.num_src == 3);
|
||||
|
||||
info.num_src = 1;
|
||||
}
|
||||
|
||||
dump_inst(&di, &assem, op, &info);
|
||||
}
|
||||
break;
|
||||
|
||||
case SVGA3DOP_PHASE:
|
||||
_debug_printf( "phase\n" );
|
||||
assem += sizeof( struct sh_op ) / sizeof( unsigned );
|
||||
|
|
@ -595,59 +705,15 @@ svga_shader_dump(
|
|||
}
|
||||
break;
|
||||
|
||||
case SVGA3DOP_RET:
|
||||
_debug_printf( "ret\n" );
|
||||
assem += sizeof( struct sh_op ) / sizeof( unsigned );
|
||||
break;
|
||||
|
||||
case SVGA3DOP_END:
|
||||
_debug_printf( "end\n" );
|
||||
finished = TRUE;
|
||||
break;
|
||||
|
||||
default:
|
||||
{
|
||||
const struct sh_opcode_info *info = svga_opcode_info( op.opcode );
|
||||
uint i;
|
||||
uint num_src = info->num_src + op.predicated;
|
||||
boolean not_first_arg = FALSE;
|
||||
const struct sh_opcode_info *info = svga_opcode_info(op.opcode);
|
||||
|
||||
assert( info->num_dst <= 1 );
|
||||
|
||||
if (op.opcode == SVGA3DOP_SINCOS && di.version.major < 3)
|
||||
num_src += 2;
|
||||
|
||||
dump_comp_op( op, info->mnemonic );
|
||||
assem += sizeof( struct sh_op ) / sizeof( unsigned );
|
||||
|
||||
if (info->num_dst > 0) {
|
||||
struct sh_dstreg dstreg = *(struct sh_dstreg *) assem;
|
||||
|
||||
dump_dstreg( dstreg, &di );
|
||||
assem += sizeof( struct sh_dstreg ) / sizeof( unsigned );
|
||||
not_first_arg = TRUE;
|
||||
}
|
||||
|
||||
for (i = 0; i < num_src; i++) {
|
||||
struct sh_srcreg srcreg;
|
||||
struct sh_srcreg indreg;
|
||||
|
||||
srcreg = *(struct sh_srcreg *) assem;
|
||||
assem += sizeof( struct sh_srcreg ) / sizeof( unsigned );
|
||||
if (srcreg.relative && !di.is_ps && di.version.major >= 2) {
|
||||
indreg = *(struct sh_srcreg *) assem;
|
||||
assem += sizeof( struct sh_srcreg ) / sizeof( unsigned );
|
||||
}
|
||||
|
||||
if (not_first_arg)
|
||||
_debug_printf( ", " );
|
||||
else
|
||||
_debug_printf( " " );
|
||||
dump_srcreg( srcreg, &indreg, &di );
|
||||
not_first_arg = TRUE;
|
||||
}
|
||||
|
||||
_debug_printf( "\n" );
|
||||
dump_inst(&di, &assem, op, info);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -41,103 +41,103 @@
|
|||
|
||||
static struct sh_opcode_info opcode_info[] =
|
||||
{
|
||||
{ "nop", 0, 0, SVGA3DOP_NOP },
|
||||
{ "mov", 1, 1, SVGA3DOP_MOV, },
|
||||
{ "add", 1, 2, SVGA3DOP_ADD, },
|
||||
{ "sub", 1, 2, SVGA3DOP_SUB, },
|
||||
{ "mad", 1, 3, SVGA3DOP_MAD, },
|
||||
{ "mul", 1, 2, SVGA3DOP_MUL, },
|
||||
{ "rcp", 1, 1, SVGA3DOP_RCP, },
|
||||
{ "rsq", 1, 1, SVGA3DOP_RSQ, },
|
||||
{ "dp3", 1, 2, SVGA3DOP_DP3, },
|
||||
{ "dp4", 1, 2, SVGA3DOP_DP4, },
|
||||
{ "min", 1, 2, SVGA3DOP_MIN, },
|
||||
{ "max", 1, 2, SVGA3DOP_MAX, },
|
||||
{ "slt", 1, 2, SVGA3DOP_SLT, },
|
||||
{ "sge", 1, 2, SVGA3DOP_SGE, },
|
||||
{ "exp", 1, 1, SVGA3DOP_EXP, },
|
||||
{ "log", 1, 1, SVGA3DOP_LOG, },
|
||||
{ "lit", 1, 1, SVGA3DOP_LIT, },
|
||||
{ "dst", 1, 2, SVGA3DOP_DST, },
|
||||
{ "lrp", 1, 3, SVGA3DOP_LRP, },
|
||||
{ "frc", 1, 1, SVGA3DOP_FRC, },
|
||||
{ "m4x4", 1, 2, SVGA3DOP_M4x4, },
|
||||
{ "m4x3", 1, 2, SVGA3DOP_M4x3, },
|
||||
{ "m3x4", 1, 2, SVGA3DOP_M3x4, },
|
||||
{ "m3x3", 1, 2, SVGA3DOP_M3x3, },
|
||||
{ "m3x2", 1, 2, SVGA3DOP_M3x2, },
|
||||
{ "call", 0, 1, SVGA3DOP_CALL, },
|
||||
{ "callnz", 0, 2, SVGA3DOP_CALLNZ, },
|
||||
{ "loop", 0, 2, SVGA3DOP_LOOP, },
|
||||
{ "ret", 0, 0, SVGA3DOP_RET, },
|
||||
{ "endloop", 0, 0, SVGA3DOP_ENDLOOP, },
|
||||
{ "label", 0, 1, SVGA3DOP_LABEL, },
|
||||
{ "dcl", 0, 0, SVGA3DOP_DCL, },
|
||||
{ "pow", 1, 2, SVGA3DOP_POW, },
|
||||
{ "crs", 1, 2, SVGA3DOP_CRS, },
|
||||
{ "sgn", 1, 3, SVGA3DOP_SGN, },
|
||||
{ "abs", 1, 1, SVGA3DOP_ABS, },
|
||||
{ "nrm", 1, 1, SVGA3DOP_NRM, }, /* 3-componenet normalization */
|
||||
{ "sincos", 1, 1, SVGA3DOP_SINCOS, },
|
||||
{ "rep", 0, 1, SVGA3DOP_REP, },
|
||||
{ "endrep", 0, 0, SVGA3DOP_ENDREP, },
|
||||
{ "if", 0, 1, SVGA3DOP_IF, },
|
||||
{ "ifc", 0, 2, SVGA3DOP_IFC, },
|
||||
{ "else", 0, 0, SVGA3DOP_ELSE, },
|
||||
{ "endif", 0, 0, SVGA3DOP_ENDIF, },
|
||||
{ "break", 0, 0, SVGA3DOP_BREAK, },
|
||||
{ "breakc", 0, 0, SVGA3DOP_BREAKC, },
|
||||
{ "mova", 1, 1, SVGA3DOP_MOVA, },
|
||||
{ "defb", 0, 0, SVGA3DOP_DEFB, },
|
||||
{ "defi", 0, 0, SVGA3DOP_DEFI, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "texcoord", 0, 0, SVGA3DOP_TEXCOORD, },
|
||||
{ "texkill", 1, 0, SVGA3DOP_TEXKILL, },
|
||||
{ "tex", 0, 0, SVGA3DOP_TEX, },
|
||||
{ "texbem", 1, 1, SVGA3DOP_TEXBEM, },
|
||||
{ "texbeml", 1, 1, SVGA3DOP_TEXBEML, },
|
||||
{ "texreg2ar", 1, 1, SVGA3DOP_TEXREG2AR, },
|
||||
{ "texreg2gb", 1, 1, SVGA3DOP_TEXREG2GB, },
|
||||
{ "texm3x2pad", 1, 1, SVGA3DOP_TEXM3x2PAD, },
|
||||
{ "texm3x2tex", 1, 1, SVGA3DOP_TEXM3x2TEX, },
|
||||
{ "texm3x3pad", 1, 1, SVGA3DOP_TEXM3x3PAD, },
|
||||
{ "texm3x3tex", 1, 1, SVGA3DOP_TEXM3x3TEX, },
|
||||
{ "reserved0", 0, 0, SVGA3DOP_RESERVED0, },
|
||||
{ "texm3x3spec", 1, 2, SVGA3DOP_TEXM3x3SPEC, },
|
||||
{ "texm3x3vspec", 1, 1, SVGA3DOP_TEXM3x3VSPEC,},
|
||||
{ "expp", 1, 1, SVGA3DOP_EXPP, },
|
||||
{ "logp", 1, 1, SVGA3DOP_LOGP, },
|
||||
{ "cnd", 1, 3, SVGA3DOP_CND, },
|
||||
{ "def", 0, 0, SVGA3DOP_DEF, },
|
||||
{ "texreg2rgb", 1, 1, SVGA3DOP_TEXREG2RGB, },
|
||||
{ "texdp3tex", 1, 1, SVGA3DOP_TEXDP3TEX, },
|
||||
{ "texm3x2depth", 1, 1, SVGA3DOP_TEXM3x2DEPTH,},
|
||||
{ "texdp3", 1, 1, SVGA3DOP_TEXDP3, },
|
||||
{ "texm3x3", 1, 1, SVGA3DOP_TEXM3x3, },
|
||||
{ "texdepth", 1, 0, SVGA3DOP_TEXDEPTH, },
|
||||
{ "cmp", 1, 3, SVGA3DOP_CMP, },
|
||||
{ "bem", 1, 2, SVGA3DOP_BEM, },
|
||||
{ "dp2add", 1, 3, SVGA3DOP_DP2ADD, },
|
||||
{ "dsx", 1, 1, SVGA3DOP_INVALID, },
|
||||
{ "dsy", 1, 1, SVGA3DOP_INVALID, },
|
||||
{ "texldd", 1, 1, SVGA3DOP_INVALID, },
|
||||
{ "setp", 1, 2, SVGA3DOP_SETP, },
|
||||
{ "texldl", 1, 1, SVGA3DOP_INVALID, },
|
||||
{ "breakp", 1, 1, SVGA3DOP_INVALID, },
|
||||
{ "nop", 0, 0, 0, 0, SVGA3DOP_NOP },
|
||||
{ "mov", 1, 1, 0, 0, SVGA3DOP_MOV, },
|
||||
{ "add", 1, 2, 0, 0, SVGA3DOP_ADD, },
|
||||
{ "sub", 1, 2, 0, 0, SVGA3DOP_SUB, },
|
||||
{ "mad", 1, 3, 0, 0, SVGA3DOP_MAD, },
|
||||
{ "mul", 1, 2, 0, 0, SVGA3DOP_MUL, },
|
||||
{ "rcp", 1, 1, 0, 0, SVGA3DOP_RCP, },
|
||||
{ "rsq", 1, 1, 0, 0, SVGA3DOP_RSQ, },
|
||||
{ "dp3", 1, 2, 0, 0, SVGA3DOP_DP3, },
|
||||
{ "dp4", 1, 2, 0, 0, SVGA3DOP_DP4, },
|
||||
{ "min", 1, 2, 0, 0, SVGA3DOP_MIN, },
|
||||
{ "max", 1, 2, 0, 0, SVGA3DOP_MAX, },
|
||||
{ "slt", 1, 2, 0, 0, SVGA3DOP_SLT, },
|
||||
{ "sge", 1, 2, 0, 0, SVGA3DOP_SGE, },
|
||||
{ "exp", 1, 1, 0, 0, SVGA3DOP_EXP, },
|
||||
{ "log", 1, 1, 0, 0, SVGA3DOP_LOG, },
|
||||
{ "lit", 1, 1, 0, 0, SVGA3DOP_LIT, },
|
||||
{ "dst", 1, 2, 0, 0, SVGA3DOP_DST, },
|
||||
{ "lrp", 1, 3, 0, 0, SVGA3DOP_LRP, },
|
||||
{ "frc", 1, 1, 0, 0, SVGA3DOP_FRC, },
|
||||
{ "m4x4", 1, 2, 0, 0, SVGA3DOP_M4x4, },
|
||||
{ "m4x3", 1, 2, 0, 0, SVGA3DOP_M4x3, },
|
||||
{ "m3x4", 1, 2, 0, 0, SVGA3DOP_M3x4, },
|
||||
{ "m3x3", 1, 2, 0, 0, SVGA3DOP_M3x3, },
|
||||
{ "m3x2", 1, 2, 0, 0, SVGA3DOP_M3x2, },
|
||||
{ "call", 0, 1, 0, 0, SVGA3DOP_CALL, },
|
||||
{ "callnz", 0, 2, 0, 0, SVGA3DOP_CALLNZ, },
|
||||
{ "loop", 0, 2, 0, 1, SVGA3DOP_LOOP, },
|
||||
{ "ret", 0, 0, 0, 0, SVGA3DOP_RET, },
|
||||
{ "endloop", 0, 0, 1, 0, SVGA3DOP_ENDLOOP, },
|
||||
{ "label", 0, 1, 0, 0, SVGA3DOP_LABEL, },
|
||||
{ "dcl", 0, 0, 0, 0, SVGA3DOP_DCL, },
|
||||
{ "pow", 1, 2, 0, 0, SVGA3DOP_POW, },
|
||||
{ "crs", 1, 2, 0, 0, SVGA3DOP_CRS, },
|
||||
{ "sgn", 1, 3, 0, 0, SVGA3DOP_SGN, },
|
||||
{ "abs", 1, 1, 0, 0, SVGA3DOP_ABS, },
|
||||
{ "nrm", 1, 1, 0, 0, SVGA3DOP_NRM, }, /* 3-componenet normalization */
|
||||
{ "sincos", 1, 3, 0, 0, SVGA3DOP_SINCOS, },
|
||||
{ "rep", 0, 1, 0, 1, SVGA3DOP_REP, },
|
||||
{ "endrep", 0, 0, 1, 0, SVGA3DOP_ENDREP, },
|
||||
{ "if", 0, 1, 0, 1, SVGA3DOP_IF, },
|
||||
{ "ifc", 0, 2, 0, 1, SVGA3DOP_IFC, },
|
||||
{ "else", 0, 0, 1, 1, SVGA3DOP_ELSE, },
|
||||
{ "endif", 0, 0, 1, 0, SVGA3DOP_ENDIF, },
|
||||
{ "break", 0, 0, 0, 0, SVGA3DOP_BREAK, },
|
||||
{ "breakc", 0, 2, 0, 0, SVGA3DOP_BREAKC, },
|
||||
{ "mova", 1, 1, 0, 0, SVGA3DOP_MOVA, },
|
||||
{ "defb", 0, 0, 0, 0, SVGA3DOP_DEFB, },
|
||||
{ "defi", 0, 0, 0, 0, SVGA3DOP_DEFI, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "???", 0, 0, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "texcoord", 1, 0, 0, 0, SVGA3DOP_TEXCOORD, },
|
||||
{ "texkill", 1, 0, 0, 0, SVGA3DOP_TEXKILL, },
|
||||
{ "tex", 1, 0, 0, 0, SVGA3DOP_TEX, },
|
||||
{ "texbem", 1, 1, 0, 0, SVGA3DOP_TEXBEM, },
|
||||
{ "texbeml", 1, 1, 0, 0, SVGA3DOP_TEXBEML, },
|
||||
{ "texreg2ar", 1, 1, 0, 0, SVGA3DOP_TEXREG2AR, },
|
||||
{ "texreg2gb", 1, 1, 0, 0, SVGA3DOP_TEXREG2GB, },
|
||||
{ "texm3x2pad", 1, 1, 0, 0, SVGA3DOP_TEXM3x2PAD, },
|
||||
{ "texm3x2tex", 1, 1, 0, 0, SVGA3DOP_TEXM3x2TEX, },
|
||||
{ "texm3x3pad", 1, 1, 0, 0, SVGA3DOP_TEXM3x3PAD, },
|
||||
{ "texm3x3tex", 1, 1, 0, 0, SVGA3DOP_TEXM3x3TEX, },
|
||||
{ "reserved0", 0, 0, 0, 0, SVGA3DOP_RESERVED0, },
|
||||
{ "texm3x3spec", 1, 2, 0, 0, SVGA3DOP_TEXM3x3SPEC, },
|
||||
{ "texm3x3vspec", 1, 1, 0, 0, SVGA3DOP_TEXM3x3VSPEC,},
|
||||
{ "expp", 1, 1, 0, 0, SVGA3DOP_EXPP, },
|
||||
{ "logp", 1, 1, 0, 0, SVGA3DOP_LOGP, },
|
||||
{ "cnd", 1, 3, 0, 0, SVGA3DOP_CND, },
|
||||
{ "def", 0, 0, 0, 0, SVGA3DOP_DEF, },
|
||||
{ "texreg2rgb", 1, 1, 0, 0, SVGA3DOP_TEXREG2RGB, },
|
||||
{ "texdp3tex", 1, 1, 0, 0, SVGA3DOP_TEXDP3TEX, },
|
||||
{ "texm3x2depth", 1, 1, 0, 0, SVGA3DOP_TEXM3x2DEPTH,},
|
||||
{ "texdp3", 1, 1, 0, 0, SVGA3DOP_TEXDP3, },
|
||||
{ "texm3x3", 1, 1, 0, 0, SVGA3DOP_TEXM3x3, },
|
||||
{ "texdepth", 1, 0, 0, 0, SVGA3DOP_TEXDEPTH, },
|
||||
{ "cmp", 1, 3, 0, 0, SVGA3DOP_CMP, },
|
||||
{ "bem", 1, 2, 0, 0, SVGA3DOP_BEM, },
|
||||
{ "dp2add", 1, 3, 0, 0, SVGA3DOP_DP2ADD, },
|
||||
{ "dsx", 1, 1, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "dsy", 1, 1, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "texldd", 1, 4, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "setp", 1, 2, 0, 0, SVGA3DOP_SETP, },
|
||||
{ "texldl", 1, 2, 0, 0, SVGA3DOP_INVALID, },
|
||||
{ "breakp", 0, 1, 0, 0, SVGA3DOP_INVALID, },
|
||||
};
|
||||
|
||||
const struct sh_opcode_info *svga_opcode_info( uint op )
|
||||
|
|
|
|||
|
|
@ -38,6 +38,8 @@ struct sh_opcode_info
|
|||
const char *mnemonic;
|
||||
unsigned num_dst:8;
|
||||
unsigned num_src:8;
|
||||
unsigned pre_dedent:1;
|
||||
unsigned post_indent:1;
|
||||
unsigned svga_opcode:16;
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue