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tu: Initial implementation of VK_EXT_graphics_pipeline_library

Browse source 
Now that the state for each pipeline is split into pieces, we can mostly
implement it by stitching together the pieces. One TODO is that we could
do more to split up the pre-rast and FS commands into separate draw
states so that we have to emit less commands when fast linking,
currently we compile the variants but delay emitting the commands until
link time, but note that even the Gallium driver doesn't currently do
this. Given the strict SSO model (e.g. with separate VPC registers for
each stage) it may even be possible to do most of the linking ahead of
time with only a few fixups for corner cases.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
This commit is contained in:
Connor Abbott 2022-08-26 18:09:27 +02:00 • committed by Marge Bot
parent 0a47002a65
commit e9f5de11d4
11 changed files with 1222 additions and 272 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

32
src/freedreno/ci/freedreno-a618-fails.txt
View file

@ -15,6 +15,22 @@ dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments5_
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more0,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more1,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more0,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more1,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
@ -23,6 +39,22 @@ gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachme
gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more0,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more1,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more0,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more1,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
spill-dEQP-VK.subgroups.ballot_broadcast.compute.subgroupbroadcast_bool,Fail
spill-dEQP-VK.subgroups.ballot_broadcast.compute.subgroupbroadcast_bool_requiredsubgroupsize128,Fail

27
src/freedreno/ci/freedreno-a630-asan-fails.txt
View file

@ -1 +1,28 @@
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.12,Crash
# https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/3759
# deqp-vk: ../src/freedreno/vulkan/tu_pipeline.c:3894: tu_pipeline_builder_init_graphics: Assertion `subpass->color_count == 0 || !create_info->pColorBlendState || subpass->color_count == create_info->pColorBlendState->attachmentCount' failed
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments5_more0,Crash
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments5_more1,Crash
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more0,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more1,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more0,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more1,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash

32
src/freedreno/ci/freedreno-a630-fails.txt
View file

@ -431,6 +431,22 @@ dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments5_
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more0,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more1,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more0,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more1,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
@ -439,6 +455,22 @@ gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachme
gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
gmem-dEQP-VK.pipeline.monolithic.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more0,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more1,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
gmem-dEQP-VK.pipeline.pipeline_library.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more0,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more1,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments4_more3,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more0,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more1,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments5_more3,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments6_more0,Crash
gmem-dEQP-VK.pipeline.fast_linked_library.color_write_enable_maxa.cwe_after_bind.attachments6_more1,Crash
# https://gitlab.freedesktop.org/mesa/mesa/-/issues/7152
spec@ext_transform_feedback@builtin-varyings gl_culldistance,Fail

10
src/freedreno/ir3/ir3_shader.c
View file

@ -615,17 +615,19 @@ ir3_trim_constlen(struct ir3_shader_variant **variants,
{
unsigned constlens[MESA_SHADER_STAGES] = {};
bool shared_consts_enable = false;
for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
if (variants[i])
if (variants[i]) {
constlens[i] = variants[i]->constlen;
shared_consts_enable =
ir3_const_state(variants[i])->shared_consts_enable;
}
}
uint32_t trimmed = 0;
STATIC_ASSERT(MESA_SHADER_STAGES <= 8 * sizeof(trimmed));
bool shared_consts_enable =
ir3_const_state(variants[MESA_SHADER_VERTEX])->shared_consts_enable;
/* Use a hw quirk for geometry shared consts, not matched with actual
* shared consts size (on a6xx).
*/

67
src/freedreno/vulkan/tu_descriptor_set.c
View file

@ -410,6 +410,46 @@ sha1_update_descriptor_set_layout(struct mesa_sha1 *ctx,
* just multiple descriptor set layouts pasted together.
*/
void
tu_pipeline_layout_init(struct tu_pipeline_layout *layout)
{
unsigned dynamic_offset_size = 0;
for (uint32_t set = 0; set < layout->num_sets; set++) {
assert(set < MAX_SETS);
layout->set[set].dynamic_offset_start = dynamic_offset_size;
if (layout->set[set].layout)
dynamic_offset_size += layout->set[set].layout->dynamic_offset_size;
}
layout->dynamic_offset_size = dynamic_offset_size;
/* We only care about INDEPENDENT_SETS for dynamic-offset descriptors,
* where all the descriptors from all the sets are combined into one set
* and we have to provide the dynamic_offset_start dynamically with fast
* linking.
*/
if (dynamic_offset_size == 0) {
layout->independent_sets = false;
}
struct mesa_sha1 ctx;
_mesa_sha1_init(&ctx);
for (unsigned s = 0; s < layout->num_sets; s++) {
if (layout->set[s].layout)
sha1_update_descriptor_set_layout(&ctx, layout->set[s].layout);
_mesa_sha1_update(&ctx, &layout->set[s].dynamic_offset_start,
sizeof(layout->set[s].dynamic_offset_start));
}
_mesa_sha1_update(&ctx, &layout->num_sets, sizeof(layout->num_sets));
_mesa_sha1_update(&ctx, &layout->push_constant_size,
sizeof(layout->push_constant_size));
_mesa_sha1_update(&ctx, &layout->independent_sets,
sizeof(layout->independent_sets));
_mesa_sha1_final(&ctx, layout->sha1);
}
VKAPI_ATTR VkResult VKAPI_CALL
tu_CreatePipelineLayout(VkDevice _device,
const VkPipelineLayoutCreateInfo *pCreateInfo,
@ -428,23 +468,16 @@ tu_CreatePipelineLayout(VkDevice _device,
return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
layout->num_sets = pCreateInfo->setLayoutCount;
layout->dynamic_offset_size = 0;
unsigned dynamic_offset_size = 0;
for (uint32_t set = 0; set < pCreateInfo->setLayoutCount; set++) {
TU_FROM_HANDLE(tu_descriptor_set_layout, set_layout,
pCreateInfo->pSetLayouts[set]);
assert(set < MAX_SETS);
layout->set[set].layout = set_layout;
layout->set[set].dynamic_offset_start = dynamic_offset_size;
if (set_layout)
vk_descriptor_set_layout_ref(&set_layout->vk);
dynamic_offset_size += set_layout->dynamic_offset_size;
}
layout->dynamic_offset_size = dynamic_offset_size;
layout->push_constant_size = 0;
for (unsigned i = 0; i < pCreateInfo->pushConstantRangeCount; ++i) {
@ -454,18 +487,10 @@ tu_CreatePipelineLayout(VkDevice _device,
}
layout->push_constant_size = align(layout->push_constant_size, 16);
layout->independent_sets =
pCreateInfo->flags & VK_PIPELINE_LAYOUT_CREATE_INDEPENDENT_SETS_BIT_EXT;
struct mesa_sha1 ctx;
_mesa_sha1_init(&ctx);
for (unsigned s = 0; s < layout->num_sets; s++) {
sha1_update_descriptor_set_layout(&ctx, layout->set[s].layout);
_mesa_sha1_update(&ctx, &layout->set[s].dynamic_offset_start,
sizeof(layout->set[s].dynamic_offset_start));
}
_mesa_sha1_update(&ctx, &layout->num_sets, sizeof(layout->num_sets));
_mesa_sha1_update(&ctx, &layout->push_constant_size,
sizeof(layout->push_constant_size));
_mesa_sha1_final(&ctx, layout->sha1);
tu_pipeline_layout_init(layout);
*pPipelineLayout = tu_pipeline_layout_to_handle(layout);
@ -483,8 +508,10 @@ tu_DestroyPipelineLayout(VkDevice _device,
if (!pipeline_layout)
return;
for (uint32_t i = 0; i < pipeline_layout->num_sets; i++)
for (uint32_t i = 0; i < pipeline_layout->num_sets; i++) {
if (pipeline_layout->set[i].layout)
vk_descriptor_set_layout_unref(&device->vk, &pipeline_layout->set[i].layout->vk);
}
vk_object_free(&device->vk, pAllocator, pipeline_layout);
}

4
src/freedreno/vulkan/tu_descriptor_set.h
View file

@ -93,6 +93,8 @@ struct tu_pipeline_layout
uint32_t dynamic_offset_start;
} set[MAX_SETS];
bool independent_sets;
uint32_t num_sets;
uint32_t push_constant_size;
uint32_t dynamic_offset_size;
@ -102,6 +104,8 @@ struct tu_pipeline_layout
VK_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, base, VkPipelineLayout,
VK_OBJECT_TYPE_PIPELINE_LAYOUT)
void tu_pipeline_layout_init(struct tu_pipeline_layout *layout);
struct tu_descriptor_set
{
struct vk_object_base base;

16
src/freedreno/vulkan/tu_device.c
View file

@ -238,11 +238,14 @@ get_device_extensions(const struct tu_physical_device *device,
.EXT_tooling_info = true,
.EXT_inline_uniform_block = true,
.EXT_mutable_descriptor_type = true,
.KHR_pipeline_library = true,
.EXT_graphics_pipeline_library = true,
};
}
static const struct vk_pipeline_cache_object_ops *const cache_import_ops[] = {
&tu_shaders_ops,
&tu_nir_shaders_ops,
NULL,
};
@ -906,6 +909,12 @@ tu_GetPhysicalDeviceFeatures2(VkPhysicalDevice physicalDevice,
features->multiDraw = true;
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_GRAPHICS_PIPELINE_LIBRARY_FEATURES_EXT: {
VkPhysicalDeviceGraphicsPipelineLibraryFeaturesEXT *features =
(VkPhysicalDeviceGraphicsPipelineLibraryFeaturesEXT *)ext;
features->graphicsPipelineLibrary = true;
break;
}
default:
break;
@ -1371,6 +1380,13 @@ tu_GetPhysicalDeviceProperties2(VkPhysicalDevice physicalDevice,
properties->maxMultiDrawCount = 2048;
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_GRAPHICS_PIPELINE_LIBRARY_PROPERTIES_EXT: {
VkPhysicalDeviceGraphicsPipelineLibraryPropertiesEXT *props =
(VkPhysicalDeviceGraphicsPipelineLibraryPropertiesEXT *)ext;
props->graphicsPipelineLibraryFastLinking = true;
props->graphicsPipelineLibraryIndependentInterpolationDecoration = true;
break;
}
default:
break;
}

983
src/freedreno/vulkan/tu_pipeline.c
View file

File diff suppressed because it is too large Load diff

42
src/freedreno/vulkan/tu_pipeline.h
View file

@ -60,9 +60,22 @@ struct tu_compiled_shaders
uint8_t active_desc_sets;
struct ir3_shader_variant *variants[MESA_SHADER_STAGES];
struct ir3_shader_variant *safe_const_variants[MESA_SHADER_STAGES];
};
struct tu_nir_shaders
{
struct vk_pipeline_cache_object base;
/* This is optional, and is only filled out when a library pipeline is
* compiled with RETAIN_LINK_TIME_OPTIMIZATION_INFO.
*/
nir_shader *nir[MESA_SHADER_STAGES];
};
extern const struct vk_pipeline_cache_object_ops tu_shaders_ops;
extern const struct vk_pipeline_cache_object_ops tu_nir_shaders_ops;
static bool inline
tu6_shared_constants_enable(const struct tu_pipeline_layout *layout,
@ -111,6 +124,8 @@ struct tu_pipeline
uint32_t dynamic_state_mask;
struct tu_draw_state dynamic_state[TU_DYNAMIC_STATE_COUNT];
VkGraphicsPipelineLibraryFlagsEXT state;
/* for dynamic states which use the same register: */
struct {
uint32_t gras_su_cntl, gras_su_cntl_mask;
@ -119,6 +134,8 @@ struct tu_pipeline
enum a5xx_line_mode line_mode;
bool provoking_vertex_last;
uint32_t multiview_mask;
struct tu_draw_state state;
} rast;
@ -209,6 +226,31 @@ struct tu_pipeline
bool z_negative_one_to_one;
} viewport;
/* Used only for libraries. compiled_shaders only contains variants compiled
* by this pipeline, and it owns them, so when it is freed they disappear.
* Similarly, nir_shaders owns the link-time NIR. shaders points to the
* shaders from this pipeline and all libraries included in it, for
* convenience.
*/
struct tu_compiled_shaders *compiled_shaders;
struct tu_nir_shaders *nir_shaders;
struct {
nir_shader *nir;
struct tu_shader_key key;
struct tu_const_state const_state;
struct ir3_shader_variant *variant, *safe_const_variant;
} shaders[MESA_SHADER_FRAGMENT + 1];
struct ir3_shader_key ir3_key;
/* Used for libraries, to stitch together an overall layout for the final
* pipeline.
*/
struct tu_descriptor_set_layout *layouts[MAX_SETS];
unsigned num_sets;
unsigned push_constant_size;
bool independent_sets;
void *executables_mem_ctx;
/* tu_pipeline_executable */
struct util_dynarray executables;

30
src/freedreno/vulkan/tu_shader.c
View file

@ -176,19 +176,32 @@ lower_vulkan_resource_index(nir_builder *b, nir_intrinsic_instr *instr,
struct tu_descriptor_set_layout *set_layout = layout->set[set].layout;
struct tu_descriptor_set_binding_layout *binding_layout =
&set_layout->binding[binding];
uint32_t base;
nir_ssa_def *base;
shader->active_desc_sets |= 1u << set;
switch (binding_layout->type) {
case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
base = (layout->set[set].dynamic_offset_start +
binding_layout->dynamic_offset_offset) / (4 * A6XX_TEX_CONST_DWORDS);
if (layout->independent_sets) {
/* With independent sets, we don't know
* layout->set[set].dynamic_offset_start until after link time which
* with fast linking means after the shader is compiled. We have to
* get it from the const file instead.
*/
base = nir_imm_int(b, binding_layout->dynamic_offset_offset / (4 * A6XX_TEX_CONST_DWORDS));
nir_ssa_def *dynamic_offset_start =
nir_load_uniform(b, 1, 32, nir_imm_int(b, 0),
.base = shader->const_state.dynamic_offset_loc + set);
base = nir_iadd(b, base, dynamic_offset_start);
} else {
base = nir_imm_int(b, (layout->set[set].dynamic_offset_start +
binding_layout->dynamic_offset_offset) / (4 * A6XX_TEX_CONST_DWORDS));
}
set = MAX_SETS;
break;
default:
base = binding_layout->offset / (4 * A6XX_TEX_CONST_DWORDS);
base = nir_imm_int(b, binding_layout->offset / (4 * A6XX_TEX_CONST_DWORDS));
break;
}
@ -204,7 +217,7 @@ lower_vulkan_resource_index(nir_builder *b, nir_intrinsic_instr *instr,
}
nir_ssa_def *def = nir_vec3(b, nir_imm_int(b, set),
nir_iadd(b, nir_imm_int(b, base),
nir_iadd(b, base,
nir_ishl(b, vulkan_idx, shift)),
shift);
@ -658,6 +671,13 @@ tu_lower_io(nir_shader *shader, struct tu_device *dev,
align(DIV_ROUND_UP(const_state->push_consts.dwords, 4),
dev->compiler->const_upload_unit);
if (layout->independent_sets) {
const_state->dynamic_offset_loc = reserved_consts_vec4 * 4;
reserved_consts_vec4 += DIV_ROUND_UP(MAX_SETS, 4);
} else {
const_state->dynamic_offset_loc = UINT32_MAX;
}
tu_shader->reserved_user_consts_vec4 = reserved_consts_vec4;
struct lower_instr_params params = {

1
src/freedreno/vulkan/tu_shader.h
View file

@ -21,6 +21,7 @@ struct tu_push_constant_range
struct tu_const_state
{
struct tu_push_constant_range push_consts;
uint32_t dynamic_offset_loc;
};
struct tu_shader