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https://gitlab.freedesktop.org/mesa/mesa.git
synced 2025-12-28 14:40:10 +01:00
Vertex shader outputs are now tightly packed into the output slots.
Fix softpipe vertex attribute setup. Also, update vs constants when the projection matrix changes (fixes samples/prim.c)
This commit is contained in:
parent
30236573da
commit
e967b246ec
4 changed files with 62 additions and 55 deletions
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@ -200,7 +200,7 @@ run_vertex_program(struct draw_context *draw,
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machine.Inputs[attr].xyzw[2].f[j] = p[2]; /*Z*/
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machine.Inputs[attr].xyzw[3].f[j] = p[3]; /*W*/
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#if 0
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if (1/*attr == 0*/) {
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if (1) {
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fprintf(file, "Input vertex %d: attr %d: %f %f %f %f\n",
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j, attr, p[0], p[1], p[2], p[3]);
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fflush( file );
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@ -212,12 +212,15 @@ run_vertex_program(struct draw_context *draw,
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#if 0
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printf("Consts:\n");
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for (i = 0; i < 4; i++) {
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printf(" %d: %f %f %f %f\n", i,
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machine.Consts[i][0],
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machine.Consts[i][1],
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machine.Consts[i][2],
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machine.Consts[i][3]);
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{
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int i;
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for (i = 0; i < 4; i++) {
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printf(" %d: %f %f %f %f\n", i,
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machine.Consts[i][0],
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machine.Consts[i][1],
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machine.Consts[i][2],
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machine.Consts[i][3]);
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}
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}
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#endif
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@ -238,7 +241,7 @@ run_vertex_program(struct draw_context *draw,
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/* store machine results */
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assert(draw->vertex_shader.outputs_written & (1 << TGSI_ATTRIB_POS));
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for (j = 0; j < count; j++) {
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unsigned attr, slot;
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unsigned /**attr,**/ slot;
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float x, y, z, w;
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/* Handle attr[0] (position) specially: */
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@ -247,7 +250,7 @@ run_vertex_program(struct draw_context *draw,
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z = vOut[j]->clip[2] = machine.Outputs[0].xyzw[2].f[j];
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w = vOut[j]->clip[3] = machine.Outputs[0].xyzw[3].f[j];
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vOut[j]->clipmask = compute_clipmask(x, y, z, w);
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vOut[j]->clipmask = 0;/*compute_clipmask(x, y, z, w);*/
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vOut[j]->edgeflag = 1;
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/* divide by w */
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@ -273,33 +276,47 @@ run_vertex_program(struct draw_context *draw,
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/* remaining attributes: */
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/* pack into sequential post-transform attrib slots */
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#if 0
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slot = 1;
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for (attr = 1; attr < TGSI_ATTRIB_MAX; attr++) {
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if (draw->vertex_shader.outputs_written & (1 << attr)) {
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assert(slot < draw->vertex_info.num_attribs);
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vOut[j]->data[slot][0] = machine.Outputs[attr].xyzw[0].f[j];
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vOut[j]->data[slot][1] = machine.Outputs[attr].xyzw[1].f[j];
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vOut[j]->data[slot][2] = machine.Outputs[attr].xyzw[2].f[j];
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vOut[j]->data[slot][3] = machine.Outputs[attr].xyzw[3].f[j];
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vOut[j]->data[slot][0] = machine.Outputs[/*attr*/slot].xyzw[0].f[j];
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vOut[j]->data[slot][1] = machine.Outputs[/*attr*/slot].xyzw[1].f[j];
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vOut[j]->data[slot][2] = machine.Outputs[/*attr*/slot].xyzw[2].f[j];
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vOut[j]->data[slot][3] = machine.Outputs[/*attr*/slot].xyzw[3].f[j];
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#if 0
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fprintf(file, "output attrib %d slot %d: %f %f %f %f\n",
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fprintf(file, "output attrib %d slot %d: %f %f %f %f vert %p\n",
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attr, slot,
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vOut[j]->data[slot][0],
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vOut[j]->data[slot][1],
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vOut[j]->data[slot][2],
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vOut[j]->data[slot][3]);
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vOut[j]->data[slot][3], vOut[j]);
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#endif
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slot++;
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}
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}
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}
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#else
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for (slot = 1; slot < draw->vertex_info.num_attribs; slot++) {
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vOut[j]->data[slot][0] = machine.Outputs[slot].xyzw[0].f[j];
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vOut[j]->data[slot][1] = machine.Outputs[slot].xyzw[1].f[j];
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vOut[j]->data[slot][2] = machine.Outputs[slot].xyzw[2].f[j];
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vOut[j]->data[slot][3] = machine.Outputs[slot].xyzw[3].f[j];
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#if 0
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memcpy(
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quad->outputs.color,
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&machine.Outputs[1].xyzw[0].f[0],
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sizeof( quad->outputs.color ) );
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fprintf(file, "output attrib slot %d: %f %f %f %f vert %p\n",
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slot,
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vOut[j]->data[slot][0],
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vOut[j]->data[slot][1],
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vOut[j]->data[slot][2],
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vOut[j]->data[slot][3], vOut[j]);
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#endif
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}
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#endif
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} /* loop over vertices */
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}
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@ -48,31 +48,6 @@ do { \
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} while (0)
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static const unsigned frag_to_vf[PIPE_ATTRIB_MAX] =
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{
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TGSI_ATTRIB_POS,
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TGSI_ATTRIB_COLOR0,
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TGSI_ATTRIB_COLOR1,
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TGSI_ATTRIB_FOG,
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TGSI_ATTRIB_TEX0,
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TGSI_ATTRIB_TEX1,
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TGSI_ATTRIB_TEX2,
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TGSI_ATTRIB_TEX3,
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TGSI_ATTRIB_TEX4,
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TGSI_ATTRIB_TEX5,
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TGSI_ATTRIB_TEX6,
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TGSI_ATTRIB_TEX7,
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TGSI_ATTRIB_VAR0,
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TGSI_ATTRIB_VAR1,
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TGSI_ATTRIB_VAR2,
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TGSI_ATTRIB_VAR3,
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TGSI_ATTRIB_VAR4,
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TGSI_ATTRIB_VAR5,
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TGSI_ATTRIB_VAR6,
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TGSI_ATTRIB_VAR7,
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};
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/**
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* Determine which post-transform / pre-rasterization vertex attributes
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* we need.
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@ -119,19 +94,17 @@ static void calculate_vertex_layout( struct softpipe_context *softpipe )
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*/
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for (i = 1; i < TGSI_ATTRIB_TEX0; i++) {
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if (inputsRead & (1 << i)) {
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assert(i < sizeof(frag_to_vf) / sizeof(frag_to_vf[0]));
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if (softpipe->setup.flatshade
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&& (i == TGSI_ATTRIB_COLOR0 || i == TGSI_ATTRIB_COLOR1))
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EMIT_ATTR(frag_to_vf[i], i, INTERP_CONSTANT);
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EMIT_ATTR(i, i, INTERP_CONSTANT);
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else
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EMIT_ATTR(frag_to_vf[i], i, INTERP_LINEAR);
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EMIT_ATTR(i, i, INTERP_LINEAR);
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}
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}
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for (i = TGSI_ATTRIB_TEX0; i < TGSI_ATTRIB_MAX; i++) {
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if (inputsRead & (1 << i)) {
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assert(i < sizeof(frag_to_vf) / sizeof(frag_to_vf[0]));
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EMIT_ATTR(frag_to_vf[i], i, INTERP_PERSPECTIVE);
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EMIT_ATTR(i, i, INTERP_PERSPECTIVE);
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softpipe->need_w = TRUE;
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}
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}
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@ -348,7 +348,9 @@ map_register_file_index(
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break;
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case TGSI_FILE_OUTPUT:
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/*
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assert( usage_bitmask == 0x0 );
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*/
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if( processor == TGSI_PROCESSOR_FRAGMENT ) {
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/* depth result -> index 0
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* color results -> index 1, 2, ...
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@ -362,8 +364,14 @@ map_register_file_index(
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}
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}
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else {
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/* vertex output slots are tightly packed, find mapped pos */
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/* mapped_index = VERT_RESULT_x */
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mapped_index = index;
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mapped_index = 0;
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for( i = 0; i < index; i++ ) {
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if( usage_bitmask & (1 << i) ) {
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mapped_index++;
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}
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}
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}
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break;
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@ -434,6 +442,7 @@ compile_instruction(
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const struct prog_instruction *inst,
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struct tgsi_full_instruction *fullinst,
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GLuint inputs_read,
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GLuint outputs_written,
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GLuint preamble_size,
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GLuint processor )
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{
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@ -453,7 +462,8 @@ compile_instruction(
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processor,
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fulldst->DstRegister.File,
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inst->DstReg.Index,
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0x0 );
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outputs_written
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);
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fulldst->DstRegister.WriteMask = convert_writemask( inst->DstReg.WriteMask );
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for( i = 0; i < fullinst->Instruction.NumSrcRegs; i++ ) {
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@ -921,6 +931,7 @@ tgsi_mesa_compile_fp_program(
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&program->Base.Instructions[i],
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&fullinst,
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inputs_read,
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~0, /*outputs_written*/
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preamble_size,
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TGSI_PROCESSOR_FRAGMENT ) ) {
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assert( i == program->Base.NumInstructions - 1 );
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@ -952,6 +963,9 @@ tgsi_mesa_compile_vp_program(
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struct tgsi_processor *processor;
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struct tgsi_full_instruction fullinst;
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GLuint inputs_read = ~0;
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GLuint outputs_written;
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outputs_written = program->Base.OutputsWritten;
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*(struct tgsi_version *) &tokens[0] = tgsi_build_version();
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@ -968,6 +982,7 @@ tgsi_mesa_compile_vp_program(
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&program->Base.Instructions[i],
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&fullinst,
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inputs_read,
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outputs_written,
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0,
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TGSI_PROCESSOR_VERTEX ) ) {
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assert( i == program->Base.NumInstructions - 1 );
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@ -113,8 +113,10 @@ static void update_vs( struct st_context *st )
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/* update pipe state */
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memset( &vs, 0, sizeof(vs) );
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vs.outputs_written = vp->Base.Base.OutputsWritten;
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vs.inputs_read = vp->Base.Base.InputsRead;
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vs.inputs_read
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= tgsi_mesa_translate_vertex_input_mask(vp->Base.Base.InputsRead);
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vs.outputs_written
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= tgsi_mesa_translate_vertex_output_mask(vp->Base.Base.OutputsWritten);
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vs.tokens = &vp->tokens[0];
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if (memcmp(&vs, &st->state.vs, sizeof(vs)) != 0 ||
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@ -129,7 +131,7 @@ static void update_vs( struct st_context *st )
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const struct st_tracked_state st_update_vs = {
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.dirty = {
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.mesa = _NEW_PROGRAM | _NEW_MODELVIEW,
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.mesa = _NEW_PROGRAM | _NEW_MODELVIEW | _NEW_PROJECTION, /*XXX MORE*/
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.st = ST_NEW_VERTEX_PROGRAM,
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},
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.update = update_vs
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