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pvr: Correctly compile graphics pipelines without a fragment shader
Fixes: dEQP-VK.pipeline.monolithic.stencil.nocolor.format.s8_uint .states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal Signed-off-by: Matt Coster <matt.coster@imgtec.com> Reported-by: James Glanville <james.glanville@imgtec.com> Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22868>
This commit is contained in:
Matt Coster
Marge Bot
parent
36db17dfa5
commit
e90deac3d8
1 changed files with 82 additions and 76 deletions
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@ -896,6 +896,9 @@ static void pvr_pds_descriptor_program_destroy(
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const struct VkAllocationCallbacks *const allocator,
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struct pvr_stage_allocation_descriptor_state *const descriptor_state)
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{
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if (!descriptor_state)
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return;
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pvr_bo_free(device, descriptor_state->pds_code.pvr_bo);
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vk_free2(&device->vk.alloc, allocator, descriptor_state->pds_info.entries);
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pvr_bo_free(device, descriptor_state->static_consts);
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@ -2067,65 +2070,84 @@ pvr_graphics_pipeline_compile(struct pvr_device *const device,
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if (result != VK_SUCCESS)
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goto err_free_build_context;
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if (pvr_has_hard_coded_shaders(&device->pdevice->dev_info) &&
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pvr_hard_code_graphics_get_flags(&device->pdevice->dev_info) &
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BITFIELD_BIT(MESA_SHADER_FRAGMENT)) {
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pvr_hard_code_graphics_fragment_state(
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&device->pdevice->dev_info,
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hard_code_pipeline_n,
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&gfx_pipeline->shader_state.fragment);
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} else {
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pvr_fragment_state_init(gfx_pipeline,
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&ctx->common_data[MESA_SHADER_FRAGMENT]);
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if (ctx->nir[MESA_SHADER_FRAGMENT]) {
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if (pvr_has_hard_coded_shaders(&device->pdevice->dev_info) &&
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pvr_hard_code_graphics_get_flags(&device->pdevice->dev_info) &
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BITFIELD_BIT(MESA_SHADER_FRAGMENT)) {
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pvr_hard_code_graphics_fragment_state(
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&device->pdevice->dev_info,
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hard_code_pipeline_n,
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&gfx_pipeline->shader_state.fragment);
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} else {
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pvr_fragment_state_init(gfx_pipeline,
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&ctx->common_data[MESA_SHADER_FRAGMENT]);
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if (!old_path) {
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struct pvr_fragment_shader_state *fragment_state =
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&gfx_pipeline->shader_state.fragment;
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if (!old_path) {
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struct pvr_fragment_shader_state *fragment_state =
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&gfx_pipeline->shader_state.fragment;
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/* FIXME: For now we just overwrite it but the compiler shouldn't be
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* returning the sh count since the driver is in charge of allocating
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* them.
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*/
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fragment_state->stage_state.const_shared_reg_count =
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sh_count[PVR_STAGE_ALLOCATION_FRAGMENT];
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/* FIXME: For now we just overwrite it but the compiler shouldn't be
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* returning the sh count since the driver is in charge of
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* allocating them.
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*/
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fragment_state->stage_state.const_shared_reg_count =
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sh_count[PVR_STAGE_ALLOCATION_FRAGMENT];
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}
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}
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result = pvr_gpu_upload_usc(
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device,
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util_dynarray_begin(&ctx->binary[MESA_SHADER_FRAGMENT]),
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ctx->binary[MESA_SHADER_FRAGMENT].size,
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cache_line_size,
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&gfx_pipeline->shader_state.fragment.bo);
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if (result != VK_SUCCESS)
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goto err_free_vertex_bo;
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/* TODO: powervr has an optimization where it attempts to recompile
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* shaders. See PipelineCompileNoISPFeedbackFragmentStage. Unimplemented
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* since in our case the optimization doesn't happen.
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*/
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result = pvr_pds_coeff_program_create_and_upload(
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device,
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allocator,
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ctx->stage_data.fs.iterator_args.fpu_iterators,
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ctx->stage_data.fs.iterator_args.num_fpu_iterators,
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ctx->stage_data.fs.iterator_args.destination,
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&gfx_pipeline->shader_state.fragment.pds_coeff_program);
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if (result != VK_SUCCESS)
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goto err_free_fragment_bo;
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result = pvr_pds_fragment_program_create_and_upload(
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device,
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allocator,
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gfx_pipeline->shader_state.fragment.bo,
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ctx->common_data[MESA_SHADER_FRAGMENT].temps,
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ctx->stage_data.fs.msaa_mode,
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ctx->stage_data.fs.phas,
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&gfx_pipeline->shader_state.fragment.pds_fragment_program);
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if (result != VK_SUCCESS)
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goto err_free_coeff_program;
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/* FIXME: For now we pass in the same explicit_const_usage since it
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* contains all invalid entries. Fix this by hooking it up to the
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* compiler.
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*/
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result = pvr_pds_descriptor_program_create_and_upload(
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device,
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allocator,
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&ctx->common_data[MESA_SHADER_FRAGMENT].compile_time_consts_data,
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&ctx->common_data[MESA_SHADER_FRAGMENT].ubo_data,
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&frag_explicit_const_usage,
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layout,
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PVR_STAGE_ALLOCATION_FRAGMENT,
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sh_reg_layout_frag,
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&gfx_pipeline->shader_state.fragment.descriptor_state);
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if (result != VK_SUCCESS)
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goto err_free_frag_program;
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}
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result = pvr_gpu_upload_usc(
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device,
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util_dynarray_begin(&ctx->binary[MESA_SHADER_FRAGMENT]),
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ctx->binary[MESA_SHADER_FRAGMENT].size,
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cache_line_size,
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&gfx_pipeline->shader_state.fragment.bo);
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if (result != VK_SUCCESS)
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goto err_free_vertex_bo;
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/* TODO: powervr has an optimization where it attempts to recompile shaders.
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* See PipelineCompileNoISPFeedbackFragmentStage. Unimplemented since in our
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* case the optimization doesn't happen.
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*/
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result = pvr_pds_coeff_program_create_and_upload(
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device,
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allocator,
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ctx->stage_data.fs.iterator_args.fpu_iterators,
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ctx->stage_data.fs.iterator_args.num_fpu_iterators,
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ctx->stage_data.fs.iterator_args.destination,
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&gfx_pipeline->shader_state.fragment.pds_coeff_program);
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if (result != VK_SUCCESS)
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goto err_free_fragment_bo;
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result = pvr_pds_fragment_program_create_and_upload(
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device,
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allocator,
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gfx_pipeline->shader_state.fragment.bo,
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ctx->common_data[MESA_SHADER_FRAGMENT].temps,
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ctx->stage_data.fs.msaa_mode,
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ctx->stage_data.fs.phas,
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&gfx_pipeline->shader_state.fragment.pds_fragment_program);
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if (result != VK_SUCCESS)
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goto err_free_coeff_program;
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result = pvr_pds_vertex_attrib_programs_create_and_upload(
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device,
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allocator,
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@ -2137,7 +2159,7 @@ pvr_graphics_pipeline_compile(struct pvr_device *const device,
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&special_vars_layout,
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&gfx_pipeline->shader_state.vertex.pds_attrib_programs);
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if (result != VK_SUCCESS)
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goto err_free_frag_program;
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goto err_free_vertex_descriptor_program;
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result = pvr_pds_descriptor_program_create_and_upload(
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device,
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@ -2159,33 +2181,12 @@ pvr_graphics_pipeline_compile(struct pvr_device *const device,
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/* assert(pvr_pds_descriptor_program_variables.temp_buff_total_size == 0); */
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/* TODO: Implement spilling with the above. */
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/* FIXME: For now we pass in the same explicit_const_usage since it contains
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* all invalid entries. Fix this by hooking it up to the compiler.
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*/
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result = pvr_pds_descriptor_program_create_and_upload(
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device,
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allocator,
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&ctx->common_data[MESA_SHADER_FRAGMENT].compile_time_consts_data,
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&ctx->common_data[MESA_SHADER_FRAGMENT].ubo_data,
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&frag_explicit_const_usage,
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layout,
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PVR_STAGE_ALLOCATION_FRAGMENT,
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sh_reg_layout_frag,
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&gfx_pipeline->shader_state.fragment.descriptor_state);
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if (result != VK_SUCCESS)
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goto err_free_vertex_descriptor_program;
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ralloc_free(ctx);
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hard_code_pipeline_n++;
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return VK_SUCCESS;
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err_free_vertex_descriptor_program:
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pvr_pds_descriptor_program_destroy(
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device,
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allocator,
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&gfx_pipeline->shader_state.vertex.descriptor_state);
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err_free_vertex_attrib_program:
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for (uint32_t i = 0;
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i < ARRAY_SIZE(gfx_pipeline->shader_state.vertex.pds_attrib_programs);
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@ -2195,6 +2196,11 @@ err_free_vertex_attrib_program:
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pvr_pds_vertex_attrib_program_destroy(device, allocator, attrib_program);
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}
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err_free_vertex_descriptor_program:
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pvr_pds_descriptor_program_destroy(
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device,
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allocator,
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&gfx_pipeline->shader_state.vertex.descriptor_state);
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err_free_frag_program:
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pvr_bo_free(device,
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gfx_pipeline->shader_state.fragment.pds_fragment_program.pvr_bo);
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