From e8dff256c07fac1484b66c7f7a71f1b9c5ffe1dd Mon Sep 17 00:00:00 2001
From: Sagar Ghuge <sagar.ghuge@intel.com>
Date: Fri, 5 Jun 2020 22:52:33 -0700
Subject: [PATCH] nir: Add new opcode for ternary addition

v2:
- Make it 2src commutative (Connor Abbott)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
---
 src/compiler/nir/nir_opcodes.py | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index 832b6215222..b114e51584d 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -957,6 +957,9 @@ if (nir_is_rounding_mode_rtz(execution_mode, bit_size)) {
 
 triop("flrp", tfloat, "", "src0 * (1 - src2) + src1 * src2")
 
+# Ternary addition
+triop("iadd3", tint, _2src_commutative + associative, "src0 + src1 + src2")
+
 # Conditional Select
 #
 # A vector conditional select instruction (like ?:, but operating per-