dzn: Rework meta blit VS

Some D3D12 drivers, like my PC's AMD driver, don't like using a
dynamic index to load from a constant buffer that's bound via
root constants. Instead, just go ahead and load the full set of
vertex data and just bcsel which one to use.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20778>
This commit is contained in:
Jesse Natalie 2023-01-18 16:31:02 -08:00 committed by Marge Bot
parent 8de0c23ac9
commit e8c8a94c2e

View file

@ -581,10 +581,20 @@ dzn_nir_blit_vs(void)
out_coords->data.driver_location = 1;
nir_ssa_def *vertex = nir_load_vertex_id(&b);
nir_ssa_def *base = nir_imul_imm(&b, vertex, 4 * sizeof(float));
nir_ssa_def *coords_arr[4] = {
nir_load_ubo(&b, 4, 32, params_desc, nir_imm_int(&b, 0),
.align_mul = 16, .align_offset = 0, .range_base = 0, .range = ~0),
nir_load_ubo(&b, 4, 32, params_desc, nir_imm_int(&b, 16),
.align_mul = 16, .align_offset = 0, .range_base = 0, .range = ~0),
nir_load_ubo(&b, 4, 32, params_desc, nir_imm_int(&b, 32),
.align_mul = 16, .align_offset = 0, .range_base = 0, .range = ~0),
nir_load_ubo(&b, 4, 32, params_desc, nir_imm_int(&b, 48),
.align_mul = 16, .align_offset = 0, .range_base = 0, .range = ~0),
};
nir_ssa_def *coords =
nir_load_ubo(&b, 4, 32, params_desc, base,
.align_mul = 16, .align_offset = 0, .range_base = 0, .range = ~0);
nir_bcsel(&b, nir_ieq_imm(&b, vertex, 0), coords_arr[0],
nir_bcsel(&b, nir_ieq_imm(&b, vertex, 1), coords_arr[1],
nir_bcsel(&b, nir_ieq_imm(&b, vertex, 2), coords_arr[2], coords_arr[3])));
nir_ssa_def *pos =
nir_vec4(&b, nir_channel(&b, coords, 0), nir_channel(&b, coords, 1),
nir_imm_float(&b, 0.0), nir_imm_float(&b, 1.0));