r600g: fix check_and_set_bank_swizzle

Need to do full check when not all bank swizzles in the group are forced
(e.g. when trying to merge interp_* group with the next instruction)

Note: This is a candidate for the 7.11 branch.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 6ba68c7654)

Conflicts:

	src/gallium/drivers/r600/r600_asm.c
This commit is contained in:
Vadim Girlin 2011-10-02 18:04:22 +02:00 committed by Marek Olšák
parent fa8cfbfb64
commit e87f79c8a4

View file

@ -732,15 +732,19 @@ static int check_and_set_bank_swizzle(struct r600_bc *bc,
{
struct alu_bank_swizzle bs;
int bank_swizzle[5];
int i, r = 0, forced = 0;
int i, r = 0, forced = 1;
boolean scalar_only = bc->chiprev == CHIPREV_CAYMAN ? false : true;
int max_slots = bc->chiprev == CHIPREV_CAYMAN ? 4 : 5;
for (i = 0; i < max_slots; i++) {
if (slots[i] && slots[i]->bank_swizzle_force) {
slots[i]->bank_swizzle = slots[i]->bank_swizzle_force;
forced = 1;
if (slots[i]) {
if (slots[i]->bank_swizzle_force) {
slots[i]->bank_swizzle = slots[i]->bank_swizzle_force;
} else {
forced = 0;
}
}
if (i < 4 && slots[i])
scalar_only = false;
}
@ -750,7 +754,11 @@ static int check_and_set_bank_swizzle(struct r600_bc *bc,
/* Just check every possible combination of bank swizzle.
* Not very efficent, but works on the first try in most of the cases. */
for (i = 0; i < 4; i++)
bank_swizzle[i] = SQ_ALU_VEC_012;
if (!slots[i] || !slots[i]->bank_swizzle_force)
bank_swizzle[i] = SQ_ALU_VEC_012;
else
bank_swizzle[i] = slots[i]->bank_swizzle;
bank_swizzle[4] = SQ_ALU_SCL_210;
while(bank_swizzle[4] <= SQ_ALU_SCL_221) {
@ -787,11 +795,13 @@ static int check_and_set_bank_swizzle(struct r600_bc *bc,
bank_swizzle[4]++;
} else {
for (i = 0; i < max_slots; i++) {
bank_swizzle[i]++;
if (bank_swizzle[i] <= SQ_ALU_VEC_210)
break;
else
bank_swizzle[i] = SQ_ALU_VEC_012;
if (!slots[i] || !slots[i]->bank_swizzle_force) {
bank_swizzle[i]++;
if (bank_swizzle[i] <= SQ_ALU_VEC_210)
break;
else
bank_swizzle[i] = SQ_ALU_VEC_012;
}
}
}
}