mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-01-10 14:40:13 +01:00
radeonsi: add PS epilog
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák
parent
eb10919b83
commit
e79bb746ab
4 changed files with 297 additions and 2 deletions
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@ -542,6 +542,7 @@ static void si_destroy_screen(struct pipe_screen* pscreen)
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sscreen->vs_prologs,
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sscreen->vs_epilogs,
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sscreen->tcs_epilogs,
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sscreen->ps_epilogs
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};
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unsigned i;
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@ -92,6 +92,7 @@ struct si_screen {
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struct si_shader_part *vs_prologs;
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struct si_shader_part *vs_epilogs;
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struct si_shader_part *tcs_epilogs;
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struct si_shader_part *ps_epilogs;
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};
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struct si_blend_color {
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@ -131,6 +131,11 @@ static void si_init_shader_ctx(struct si_shader_context *ctx,
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LLVMTargetMachineRef tm,
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struct tgsi_shader_info *info);
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/* Ideally pass the sample mask input to the PS epilog as v13, which
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* is its usual location, so that the shader doesn't have to add v_mov.
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*/
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#define PS_EPILOG_SAMPLEMASK_MIN_LOC 13
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/* The VS location of the PrimitiveID input is the same in the epilog,
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* so that the main shader part doesn't have to move it.
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*/
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@ -2530,6 +2535,100 @@ static void si_llvm_emit_fs_epilogue(struct lp_build_tgsi_context *bld_base)
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si_export_mrt_z(bld_base, depth, stencil, samplemask);
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}
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/**
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* Return PS outputs in this order:
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*
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* v[0:3] = color0.xyzw
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* v[4:7] = color1.xyzw
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* ...
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* vN+0 = Depth
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* vN+1 = Stencil
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* vN+2 = SampleMask
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* vN+3 = SampleMaskIn (used for OpenGL smoothing)
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*
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* The alpha-ref SGPR is returned via its original location.
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*/
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static void si_llvm_return_fs_outputs(struct lp_build_tgsi_context *bld_base)
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{
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struct si_shader_context *ctx = si_shader_context(bld_base);
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struct si_shader *shader = ctx->shader;
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struct lp_build_context *base = &bld_base->base;
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struct tgsi_shader_info *info = &shader->selector->info;
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LLVMBuilderRef builder = base->gallivm->builder;
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unsigned i, j, first_vgpr, vgpr;
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LLVMValueRef color[8][4] = {};
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LLVMValueRef depth = NULL, stencil = NULL, samplemask = NULL;
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LLVMValueRef ret;
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/* Read the output values. */
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for (i = 0; i < info->num_outputs; i++) {
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unsigned semantic_name = info->output_semantic_name[i];
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unsigned semantic_index = info->output_semantic_index[i];
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switch (semantic_name) {
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case TGSI_SEMANTIC_COLOR:
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assert(semantic_index < 8);
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for (j = 0; j < 4; j++) {
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LLVMValueRef ptr = ctx->radeon_bld.soa.outputs[i][j];
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LLVMValueRef result = LLVMBuildLoad(builder, ptr, "");
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color[semantic_index][j] = result;
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}
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break;
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case TGSI_SEMANTIC_POSITION:
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depth = LLVMBuildLoad(builder,
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ctx->radeon_bld.soa.outputs[i][2], "");
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break;
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case TGSI_SEMANTIC_STENCIL:
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stencil = LLVMBuildLoad(builder,
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ctx->radeon_bld.soa.outputs[i][1], "");
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break;
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case TGSI_SEMANTIC_SAMPLEMASK:
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samplemask = LLVMBuildLoad(builder,
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ctx->radeon_bld.soa.outputs[i][0], "");
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break;
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default:
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fprintf(stderr, "Warning: SI unhandled fs output type:%d\n",
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semantic_name);
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}
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}
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/* Fill the return structure. */
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ret = ctx->return_value;
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/* Set SGPRs. */
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ret = LLVMBuildInsertValue(builder, ret,
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bitcast(bld_base, TGSI_TYPE_SIGNED,
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LLVMGetParam(ctx->radeon_bld.main_fn,
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SI_PARAM_ALPHA_REF)),
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SI_SGPR_ALPHA_REF, "");
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/* Set VGPRs */
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first_vgpr = vgpr = SI_SGPR_ALPHA_REF + 1;
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for (i = 0; i < ARRAY_SIZE(color); i++) {
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if (!color[i][0])
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continue;
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for (j = 0; j < 4; j++)
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ret = LLVMBuildInsertValue(builder, ret, color[i][j], vgpr++, "");
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}
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if (depth)
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ret = LLVMBuildInsertValue(builder, ret, depth, vgpr++, "");
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if (stencil)
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ret = LLVMBuildInsertValue(builder, ret, stencil, vgpr++, "");
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if (samplemask)
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ret = LLVMBuildInsertValue(builder, ret, samplemask, vgpr++, "");
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/* Add the input sample mask for smoothing at the end. */
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if (vgpr < first_vgpr + PS_EPILOG_SAMPLEMASK_MIN_LOC)
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vgpr = first_vgpr + PS_EPILOG_SAMPLEMASK_MIN_LOC;
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ret = LLVMBuildInsertValue(builder, ret,
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LLVMGetParam(ctx->radeon_bld.main_fn,
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SI_PARAM_SAMPLE_COVERAGE), vgpr++, "");
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ctx->return_value = ret;
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}
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static void build_tex_intrinsic(const struct lp_build_tgsi_action *action,
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struct lp_build_tgsi_context *bld_base,
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struct lp_build_emit_data *emit_data);
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@ -3723,7 +3822,7 @@ static void create_function(struct si_shader_context *ctx)
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struct si_shader *shader = ctx->shader;
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LLVMTypeRef params[SI_NUM_PARAMS + SI_NUM_VERTEX_BUFFERS], v3i32;
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LLVMTypeRef returns[16+32*4];
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unsigned i, last_array_pointer, last_sgpr, num_params;
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unsigned i, last_array_pointer, last_sgpr, num_params, num_return_sgprs;
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unsigned num_returns = 0;
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v3i32 = LLVMVectorType(ctx->i32, 3);
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@ -3869,6 +3968,27 @@ static void create_function(struct si_shader_context *ctx)
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params[SI_PARAM_SAMPLE_COVERAGE] = ctx->f32;
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params[SI_PARAM_POS_FIXED_PT] = ctx->f32;
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num_params = SI_PARAM_POS_FIXED_PT+1;
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if (!ctx->is_monolithic) {
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/* Outputs for the epilog. */
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num_return_sgprs = SI_SGPR_ALPHA_REF + 1;
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num_returns =
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num_return_sgprs +
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util_bitcount(shader->selector->info.colors_written) * 4 +
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shader->selector->info.writes_z +
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shader->selector->info.writes_stencil +
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shader->selector->info.writes_samplemask +
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1 /* SampleMaskIn */;
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num_returns = MAX2(num_returns,
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num_return_sgprs +
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PS_EPILOG_SAMPLEMASK_MIN_LOC + 1);
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for (i = 0; i < num_return_sgprs; i++)
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returns[i] = ctx->i32;
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for (; i < num_returns; i++)
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returns[i] = ctx->f32;
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}
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break;
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default:
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@ -4664,7 +4784,10 @@ static int si_compile_tgsi_shader(struct si_screen *sscreen,
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break;
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case TGSI_PROCESSOR_FRAGMENT:
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ctx.radeon_bld.load_input = declare_input_fs;
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bld_base->emit_epilogue = si_llvm_emit_fs_epilogue;
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if (is_monolithic)
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bld_base->emit_epilogue = si_llvm_emit_fs_epilogue;
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else
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bld_base->emit_epilogue = si_llvm_return_fs_outputs;
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break;
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default:
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assert(!"Unsupported shader type");
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@ -5181,6 +5304,159 @@ static bool si_shader_select_tcs_parts(struct si_screen *sscreen,
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return shader->epilog != NULL;
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}
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/**
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* Compile the pixel shader epilog. This handles everything that must be
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* emulated for pixel shader exports. (alpha-test, format conversions, etc)
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*/
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static bool si_compile_ps_epilog(struct si_screen *sscreen,
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LLVMTargetMachineRef tm,
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struct pipe_debug_callback *debug,
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struct si_shader_part *out)
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{
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union si_shader_part_key *key = &out->key;
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struct si_shader shader = {};
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struct si_shader_context ctx;
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struct gallivm_state *gallivm = &ctx.radeon_bld.gallivm;
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struct lp_build_tgsi_context *bld_base = &ctx.radeon_bld.soa.bld_base;
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LLVMTypeRef params[16+8*4+3];
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LLVMValueRef depth = NULL, stencil = NULL, samplemask = NULL;
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int last_array_pointer, last_sgpr, num_params, i;
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bool status = true;
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si_init_shader_ctx(&ctx, sscreen, &shader, tm, NULL);
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ctx.type = TGSI_PROCESSOR_FRAGMENT;
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shader.key.ps.epilog = key->ps_epilog.states;
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/* Declare input SGPRs. */
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params[SI_PARAM_RW_BUFFERS] = ctx.i64;
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params[SI_PARAM_CONST_BUFFERS] = ctx.i64;
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params[SI_PARAM_SAMPLERS] = ctx.i64;
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params[SI_PARAM_UNUSED] = ctx.i64;
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params[SI_PARAM_ALPHA_REF] = ctx.f32;
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last_array_pointer = -1;
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last_sgpr = SI_PARAM_ALPHA_REF;
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/* Declare input VGPRs. */
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num_params = (last_sgpr + 1) +
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util_bitcount(key->ps_epilog.colors_written) * 4 +
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key->ps_epilog.writes_z +
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key->ps_epilog.writes_stencil +
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key->ps_epilog.writes_samplemask;
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num_params = MAX2(num_params,
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last_sgpr + 1 + PS_EPILOG_SAMPLEMASK_MIN_LOC + 1);
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assert(num_params <= ARRAY_SIZE(params));
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for (i = last_sgpr + 1; i < num_params; i++)
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params[i] = ctx.f32;
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/* Create the function. */
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si_create_function(&ctx, NULL, 0, params, num_params,
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last_array_pointer, last_sgpr);
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/* Disable elimination of unused inputs. */
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radeon_llvm_add_attribute(ctx.radeon_bld.main_fn,
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"InitialPSInputAddr", 0xffffff);
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/* Process colors. */
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unsigned vgpr = last_sgpr + 1;
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unsigned colors_written = key->ps_epilog.colors_written;
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int last_color_export = -1;
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/* Find the last color export. */
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if (!key->ps_epilog.writes_z &&
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!key->ps_epilog.writes_stencil &&
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!key->ps_epilog.writes_samplemask) {
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unsigned spi_format = key->ps_epilog.states.spi_shader_col_format;
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/* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
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if (colors_written == 0x1 && key->ps_epilog.states.last_cbuf > 0) {
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/* Just set this if any of the colorbuffers are enabled. */
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if (spi_format &
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((1llu << (4 * (key->ps_epilog.states.last_cbuf + 1))) - 1))
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last_color_export = 0;
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} else {
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for (i = 0; i < 8; i++)
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if (colors_written & (1 << i) &&
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(spi_format >> (i * 4)) & 0xf)
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last_color_export = i;
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}
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}
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while (colors_written) {
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LLVMValueRef color[4];
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int mrt = u_bit_scan(&colors_written);
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for (i = 0; i < 4; i++)
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color[i] = LLVMGetParam(ctx.radeon_bld.main_fn, vgpr++);
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si_export_mrt_color(bld_base, color, mrt,
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num_params - 1,
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mrt == last_color_export);
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}
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/* Process depth, stencil, samplemask. */
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if (key->ps_epilog.writes_z)
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depth = LLVMGetParam(ctx.radeon_bld.main_fn, vgpr++);
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if (key->ps_epilog.writes_stencil)
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stencil = LLVMGetParam(ctx.radeon_bld.main_fn, vgpr++);
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if (key->ps_epilog.writes_samplemask)
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samplemask = LLVMGetParam(ctx.radeon_bld.main_fn, vgpr++);
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if (depth || stencil || samplemask)
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si_export_mrt_z(bld_base, depth, stencil, samplemask);
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else if (last_color_export == -1)
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si_export_null(bld_base);
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/* Compile. */
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LLVMBuildRetVoid(gallivm->builder);
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radeon_llvm_finalize_module(&ctx.radeon_bld);
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if (si_compile_llvm(sscreen, &out->binary, &out->config, tm,
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gallivm->module, debug, ctx.type,
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"Fragment Shader Epilog"))
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status = false;
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radeon_llvm_dispose(&ctx.radeon_bld);
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return status;
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}
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/**
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* Select and compile (or reuse) pixel shader parts (prolog & epilog).
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*/
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static bool si_shader_select_ps_parts(struct si_screen *sscreen,
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LLVMTargetMachineRef tm,
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struct si_shader *shader,
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struct pipe_debug_callback *debug)
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{
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struct tgsi_shader_info *info = &shader->selector->info;
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union si_shader_part_key epilog_key;
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/* Get the epilog. */
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memset(&epilog_key, 0, sizeof(epilog_key));
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epilog_key.ps_epilog.colors_written = info->colors_written;
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epilog_key.ps_epilog.writes_z = info->writes_z;
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epilog_key.ps_epilog.writes_stencil = info->writes_stencil;
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epilog_key.ps_epilog.writes_samplemask = info->writes_samplemask;
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epilog_key.ps_epilog.states = shader->key.ps.epilog;
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shader->epilog =
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si_get_shader_part(sscreen, &sscreen->ps_epilogs,
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&epilog_key, tm, debug,
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si_compile_ps_epilog);
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if (!shader->epilog)
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return false;
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/* The sample mask input is always enabled, because the API shader always
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* passes it through to the epilog. Disable it here if it's unused.
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*/
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if (!shader->key.ps.epilog.poly_line_smoothing &&
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!shader->selector->info.reads_samplemask)
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shader->config.spi_ps_input_ena &= C_0286CC_SAMPLE_COVERAGE_ENA;
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return true;
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}
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int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
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struct si_shader *shader,
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struct pipe_debug_callback *debug)
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@ -5207,6 +5483,16 @@ int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
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if (!si_shader_select_tes_parts(sscreen, tm, shader, debug))
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return -1;
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break;
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case PIPE_SHADER_FRAGMENT:
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if (!si_shader_select_ps_parts(sscreen, tm, shader, debug))
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return -1;
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/* Make sure we have at least as many VGPRs as there
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* are allocated inputs.
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*/
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shader->config.num_vgprs = MAX2(shader->config.num_vgprs,
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shader->num_input_vgprs);
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break;
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}
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/* Update SGPR and VGPR counts. */
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@ -281,6 +281,13 @@ union si_shader_part_key {
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struct {
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struct si_tcs_epilog_bits states;
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} tcs_epilog;
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struct {
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struct si_ps_epilog_bits states;
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unsigned colors_written:8;
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unsigned writes_z:1;
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unsigned writes_stencil:1;
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unsigned writes_samplemask:1;
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} ps_epilog;
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};
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union si_shader_key {
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