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radeonsi: fill part mode tcs aco shader info
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24443>
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ac867af099
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1 changed files with 9 additions and 2 deletions
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@ -59,7 +59,8 @@ si_fill_aco_options(struct si_shader *shader, struct aco_compiler_options *optio
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}
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static void
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si_fill_aco_shader_info(struct si_shader *shader, struct aco_shader_info *info)
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si_fill_aco_shader_info(struct si_shader *shader, struct aco_shader_info *info,
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struct si_shader_args *args)
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{
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const struct si_shader_selector *sel = shader->selector;
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const union si_shader_key *key = &shader->key;
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@ -84,6 +85,12 @@ si_fill_aco_shader_info(struct si_shader *shader, struct aco_shader_info *info)
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case MESA_SHADER_TESS_CTRL:
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info->vs.tcs_in_out_eq = key->ge.opt.same_patch_vertices;
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info->vs.tcs_temp_only_input_mask = sel->info.tcs_vgpr_only_inputs;
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info->has_epilog = !shader->is_monolithic;
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info->tcs.pass_tessfactors_by_reg = sel->info.tessfactors_are_def_in_all_invocs;
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info->tcs.patch_stride = si_get_tcs_out_patch_stride(&sel->info);
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info->tcs.tcs_offchip_layout = args->tcs_offchip_layout;
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info->tcs.tes_offchip_addr = args->tes_offchip_addr;
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info->tcs.vs_state_bits = args->vs_state_bits;
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break;
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case MESA_SHADER_FRAGMENT:
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info->ps.num_interp = si_get_ps_num_interp(shader);
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@ -144,7 +151,7 @@ si_aco_compile_shader(struct si_shader *shader,
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si_fill_aco_options(shader, &options, debug);
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struct aco_shader_info info = {0};
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si_fill_aco_shader_info(shader, &info);
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si_fill_aco_shader_info(shader, &info, args);
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nir_shader *shaders[2];
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unsigned num_shaders = 0;
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